Semiconductor Unit Manufacturing via Vacuum Printed Conductive Grooves
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Solution Overview
Problem
Current semiconductor assembly manufacturing methods, such as package on package, redistribution layer, and adapter plate technologies, face challenges including increased thickness, high contamination, warpage due to reflow soldering, and limited miniaturization capabilities, which are inadequate for modern electronic products with increasing component density and miniaturization needs.
Innovation Solution
A method involving vacuum printing to form a second conductive circuit on a substrate with a plastic seal layer, reducing the need for substrate stacking, minimizing warpage, and eliminating wet process contamination, by filling grooves with a conductive material having a high thixotropic index and viscosity, thereby enabling miniaturized and reliable semiconductor units with improved electrical performance and reduced manufacturing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If package on package technology is used to assemble electronic components on multiple substrates, then the integration capability and system complexity are improved, but the overall thickness of the semiconductor assembly is increased and multiple reflow soldering processes cause warpage and alignment difficulties
Solution Approach 1:
The patent combines multiple electronic components and substrates into a single integrated semiconductor assembly structure. The first and second electronic components are mounted on different sides of the substrate and connected through conductive circuits embedded in the substrate, eliminating the need for separate substrate stacking and reducing overall thickness while maintaining integration capability.
Solution Approach 2:
The patent transitions from a vertical stacking approach (package on package) to a planar integration approach where conductive circuits are embedded within the substrate plane. This allows electrical connections to be established through the substrate thickness rather than requiring multiple external substrate layers, effectively reducing the overall assembly thickness.
2Ease of manufacture
If wet process is used for wiring in substrates, then the circuit fabrication is completed, but high contamination is generated
Solution Approach 1:
The patent replaces the wet chemical etching process with a mechanical drilling process to create through-holes in the substrate. Conductive material is then filled into these drilled holes to establish electrical connections. This mechanical approach eliminates the contamination issues associated with wet chemical processes while maintaining effective circuit fabrication capability.
3Reliability
If multiple times of reflow soldering is performed for assembly, then the electronic components are connected to substrates, but warpage occurs and alignment becomes difficult
Solution Approach 1:
The patent performs preliminary electrical connection establishment by embedding conductive circuits within the substrate during the circuit fabrication stage, before the final assembly process. This preliminary action reduces the need for multiple reflow soldering operations, thereby minimizing warpage and improving alignment precision in the final assembly.
4Ease of manufacture
If redistribution layer process is used for wiring on fan-out molding, then the wiring is completed, but the package area is increased and the technology is limited to simple chip assembly
Solution Approach 1:
The patent moves the wiring and circuit fabrication process from the surface plane (requiring fan-out molding and redistribution layers) to the internal volume of the substrate through embedded conductive circuits. This three-dimensional integration approach eliminates the need for increased package area while maintaining full wiring capability and enabling complex system integration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach miniaturizes semiconductor units, enhances reliability, reduces manufacturing costs, and stabilizes wiring with high-density conductive circuits, eliminating the need for multiple reflow soldering and substrate stacking, thus addressing the limitations of existing methods.
Implementation Method 1
filling a conductive material in each of the grooves by vacuum printing so as to form a second conductive circuit
Data Source
AI summary
A semiconductor assembly manufacturing method includes: providing a substrate including a first conductive circuit; disposing a first electronic component on a side of the substrate; forming a first plastic seal layer covering the substrate and the first electronic component; setting up a plurality of grooves in the first plastic seal layer, the groove exposes at least a portion of the first conductive circuit of the substrate; and filling a conductive material in each of the grooves by vacuum printing so as to form a second conductive circuit electrically connected to the first conductive circuit of the substrate, and a second electronic component pad position thereof in the first plastic seal layer.