Semiconductor Variable Capacitor With Decoupled AC DC Control
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Solution Overview
Problem
Existing semiconductor variable capacitors face limitations in achieving high capacitance density, linear capacitance control over a wide range of voltages, and are prone to distortion due to AC signal interference, making them unsuitable for integrated circuits and high-frequency applications.
Innovation Solution
A semiconductor variable capacitor MOS structure with at least three terminals, where one terminal modulates the equivalent capacitor area by adjusting the DC voltage, decoupling AC and DC signals to maintain capacitance value integrity, and utilizing a MOS capacitance instead of a pn-junction for increased density and linearity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a pn-junction varactor is used to vary capacitance by changing reverse bias voltage, then the capacitance can be tuned over a range of values, but the capacitance density is low and the capacitance value is distorted by AC signal superposition
Solution Approach 1:
The patent changes the fundamental operating parameter from voltage-dependent depletion width (pn-junction) to area-dependent MOS capacitance. By applying DC control voltage to the MOS gate to modulate the effective capacitor area while keeping the MOS capacitance terminals at AC ground potential, the invention achieves high capacitance density determined by dielectric thickness and eliminates AC signal distortion by preventing AC voltage superposition on the control voltage.
2Device complexity
If a two-terminal varactor structure is used, then the device is simple, but the AC voltage superimposes on the DC control voltage causing capacitance distortion
Solution Approach 1:
The patent segments the varactor function into two independent parts: a three-terminal MOS capacitor structure where the control terminal (gate) is separated from the capacitance terminals. This segmentation allows independent control of DC control voltage and AC signal, preventing their superposition and eliminating capacitance distortion while maintaining reasonable device complexity through standard MOS fabrication processes.
3Quantity of substance
If the depletion region thickness is varied to change capacitance, then the capacitance can be tuned, but the maximum capacitance value is limited due to non-zero reverse saturation current
Solution Approach 1:
The patent changes the capacitance modulation mechanism from varying depletion region thickness (pn-junction) to varying effective capacitor area (MOS). This allows the depletion region to be fully eliminated (enhancement mode) achieving zero reverse saturation current, while maximum capacitance is determined by the full MOS capacitor area and thin dielectric layer, enabling extremely high capacitance values.
4Quantity of substance
If a MOS capacitor structure is used to increase capacitance density, then the capacitance per unit area increases, but the control mechanism becomes more complex
Solution Approach 1:
The patent uses the inherent three-terminal structure of MOS capacitors (gate, plate1, plate2) to segment the control function from the capacitance function. The gate terminal provides independent DC voltage control to modulate effective area, while the plate terminals handle AC signals at ground potential. This segmentation simplifies the control mechanism by eliminating the need for complex biasing circuits required in two-terminal varactors.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides high capacitance density, improved control reliability, and a linear dependence on control voltage, reducing process variation sensitivity and AC signal distortion, making it suitable for integrated circuits and high-frequency applications.
Implementation Method 1
the value of stored charge of the present device can be determined by the thickness of the dielectric layer
Implementation Method 2
a thin film of high-insulation, low-dielectric-loss dielectric material
Implementation Method 3
the thickness of a depletion region formed in a pn-junction diode is varied by changing a reverse bias voltage to alter the junction transition capacitance
Data Source
AI summary
A novel semiconductor variable capacitor is presented. The semiconductor structure is simple and is based on a semiconductor variable MOS capacitor structure suitable for integrated circuits, which has at least three terminals, one of which is used to modulate the equivalent capacitor area of the MOS structure by increasing or decreasing its DC voltage with respect to another terminal of the device, in order to change the capacitance over a wide ranges of values. Furthermore, the present invention decouples the AC signal and the DC control voltage avoiding distortion and increasing the performance of the device, such as its control characteristic. The present invention is simple and only slightly dependent on the variations due to the fabrication process. It exhibits a high value of capacitance density and, if opportunely implemented, shows a linear dependence of the capacitance value with respect to the voltage of its control terminal.