Semiconductor Interconnection via Hole Transition
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Solution Overview
Problem
Conventional semiconductor devices face disconnection issues in the fine isolated interconnection portions extended from macro circuits due to uneven exposure resolution and density differences between sparsely and densely arranged interconnections, leading to potential disconnection during manufacturing.
Innovation Solution
A semiconductor device configuration where fine interconnections of 0.1 μm or less are integrated within a macro circuit, and a wider extension wiring is connected to at least two fine interconnections, with these interconnections arranged in parallel or with tapered shapes to stabilize the connection region, suppressing exposure intensity changes and preventing disconnection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If fine interconnections are extended from macro circuit to outside within same layer, then connection is established, but disconnection occurs due to uneven exposure resolution and density differences
Solution Approach 1:
The patent introduces a via hole structure to transition the interconnection from a single-layer fine line to a multi-layer structure. The via hole connects the fine interconnection in the first interlayer insulating film to the extension wiring in the second interlayer insulating film, effectively moving the connection problem into a third dimension (vertical layering) to avoid the exposure resolution issues in the horizontal plane.
Solution Approach 2:
The via hole acts as an intermediary element between the fine interconnection and the extension wiring. It provides a reliable connection point that bridges the density transition zone, allowing the fine interconnection to be properly connected to the wider extension wiring without direct exposure to the problematic density transition in the same layer.
2Adaptability or versatility
If interconnection width varies from fine to wide, then connection to extension wiring is achieved, but disconnection occurs in the transition region
Solution Approach 1:
The patent resolves the width transition problem by moving to a different layer. The fine interconnection in the first layer maintains its narrow width, while the extension wiring in the second layer can be wider. The via hole provides the vertical connection, eliminating the need for a horizontal width transition that causes exposure issues.
Solution Approach 2:
The interconnection path is segmented into distinct sections: the fine interconnection in the first interlayer insulating film, the via hole connection, and the extension wiring in the second interlayer insulating film. This segmentation allows each section to be optimized independently without the problematic continuous width transition.
3Productivity
If minimum width interconnection is used in macro circuit, then circuit integration is achieved, but disconnection occurs near extension wiring connection point
Solution Approach 1:
The patent allows the minimum width interconnection to maintain its narrow profile in the first layer for high integration density, while the connection to the wider extension wiring is achieved through the via hole in the vertical dimension. This eliminates the need to widen the interconnection horizontally near the connection point.
Solution Approach 2:
The via hole serves as an intermediary that connects the minimum width interconnection to the wider extension wiring without requiring the interconnection itself to change width. This mediator allows the fine interconnection to maintain its narrow width for high density while still achieving reliable connection to the extension wiring.
Data Source
AI summary
A semiconductor device having macro circuit including a plurality of fine interconnections, an extension interconnection wider than the fine interconnections, having a first end connected to one or more of the fine interconnections and a second end located in an area of the semiconductor device external to the macro circuit, and one or more of the fine interconnections widened towards the connection to the extension wiring interconnection. The extension interconnection is formed in the same layer as one or more of the interconnections connected to the extension interconnection.