Semiconductor Via Structure with Selective Liner Coating

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Solution Overview

Problem

Conventional semiconductor via structures suffer from electromigration-induced voiding and increased resistivity due to the addition of liner materials, which complicates signal propagation and structural integrity.

Innovation Solution

A semiconductor device design where a via connects two conductive lines, with a first liner material coating the via side walls and a second liner material applied only to the via top surface, eliminating the liner material from the via bottom surface to reduce resistance and prevent electromigration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If liner material is added to line the via to prevent electromigration, then electromigration resistance is improved, but via resistivity increases

Engineering Contradiction:
Improveelectromigration resistanceVSAvoidvia resistivity
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies liner material selectively to specific regions of the via structure - coating the via sidewalls and bottom surface but excluding the via top surface. This local differentiation allows the liner to provide electromigration protection where needed while minimizing its presence in regions where it would increase resistance, thereby resolving the contradiction between reliability and manufacturing precision.

Inventive Principle:
Principle #3Local quality

2Stability of the object's composition

If liner material is deposited along via inner surfaces to prevent electromigration, then via material stability is improved, but contact area is reduced

Engineering Contradiction:
Improvevia material stabilityVSAvoidcontact area
Core Design Contradiction:
Stability of the object's compositionVSArea of stationary object

Solution Approach 1:

The liner material is applied locally to the via sidewalls and bottom surface where stability is needed, while deliberately excluding the via top surface to maximize contact area. This spatially differentiated approach allows the system to achieve both via material stability and adequate contact area simultaneously.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration reduces via resistance and prevents electromigration by increasing contact area and surface area for the liner material, enhancing signal propagation and structural integrity while minimizing void formation.

Implementation Method 1

depositing a first liner material along inner surfaces of the via side walls and the via bottom surface

Methodology Applied
Scientific EffectPhysical vapor deposition: Physical Vapour Deposition

Implementation Method 2

depositing a first liner material along inner surfaces of the via side walls and the via bottom surface

Methodology Applied
Scientific EffectChemical vapor deposition: Chemical Vapour Deposition

Implementation Method 3

depositing a via material into the via forming a via material top surface

Methodology Applied
Scientific EffectElectroplating: Electroplating

Implementation Method 4

depositing a via material into the via forming a via material top surface

Methodology Applied
Scientific EffectElectroless deposition: Electrodeposition

Implementation Method 5

depositing a second liner material on the via material top surface

Methodology Applied
Scientific EffectPhysical vapor deposition: Physical Vapour Deposition

Implementation Method 6

depositing a second liner material on the via material top surface

Methodology Applied
Scientific EffectChemical vapor deposition: Chemical Vapour Deposition

Data Source

PatentUS10460990B2Semiconductor via structure with lower electrical resistance
Publication Date: 2019.10.29 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US10460990B2 patent drawing
  • US10460990B2 patent drawing

AI summary

A semiconductor device and method of making the same, wherein in accordance with an embodiment of the present invention, the device includes a first conductive line including a first conductive material, and a second conductive line including a second conductive material. A via connects the first conductive line to the second conductive line, wherein the via includes conductive via material, wherein the via material top surface is coated with a liner material, wherein the via is a bottomless via.