Semiconductor Device VLD Region Curvature Control
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Solution Overview
Problem
In semiconductor devices for power applications, the concentration of electric fields and currents on PN junctions with large curvature leads to reliability issues and potential device damage, particularly due to the formation of curved PN junctions between the active region and the well region.
Innovation Solution
A semiconductor device design featuring a second conductive type inside VLD region with the same depth as the active region, gradually increasing to match the well region's depth, and an outside VLD region to prevent the formation of PN junctions with large curvature, thereby distributing electric fields and currents more evenly.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the well region is formed deeper than the active region to prevent PN junction formation, then the curvature of PN junction is reduced, but a curved portion is formed in the inner circumferential side of the well region resulting in localized high curvature PN junctions
Solution Approach 1:
The patent applies local quality by creating a VLD region with varying doping concentrations at different locations. The doping concentration is highest near the well region and gradually decreases toward the active region, allowing each local area to have optimized electrical characteristics that prevent high curvature PN junction formation while maintaining overall device performance
Solution Approach 2:
The patent changes the doping concentration parameter spatially within the VLD region. By gradually varying the doping concentration from the well region outward, the patent transforms the abrupt depth discontinuity into a gradual transition, eliminating the formation of high curvature PN junctions and their associated reliability issues
2Device complexity
If the depth of the active region is decreased to simplify structure, then the curvature of PN junction increases, but this causes electric field and current concentration leading to device damage
Solution Approach 1:
The VLD region acts as an intermediary between the active region and the well region. This intermediate layer with graded doping concentration smooths the transition between regions of different depths, preventing direct contact that would create high curvature PN junctions and their harmful electric field concentration effects
Data Source
AI summary
A semiconductor device includes a first conductive type semiconductor substrate, a second conductive type active region formed on a top surface side of the semiconductor substrate, a second conductive type inside VLD region formed to contact the active region on the top surface side in a plan view, and a second conductive type well region formed to contact a portion opposite to the portion contacting the active region of the inside VLD region on the top surface side in a plan view. The well region is formed to be deeper than the active region. The inside VLD region has the same depth as that of the active region in the portion contacting the active region, the depth gradually increasing from the active region toward the well region and becoming the same as the depth of the well region in the portion contacting the well region.