Semiconductor Wafer Bonding Stress Distribution

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Solution Overview

Problem

The existing semiconductor apparatuses face cracking issues due to uneven stress distribution when stacked, particularly when metal pads are not disposed in regions parallel to the cleavage plane, leading to increased bonding strength challenges.

Innovation Solution

The semiconductor apparatus is designed with a specific arrangement of bonded portions between circular ranges on the bonding face, ensuring that any straight line passing through these ranges intersects at least one bonded portion, thereby distributing stress more evenly and reducing the likelihood of cracking.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If metal pads are not disposed in regions parallel to the cleavage plane, then the bonding process is simpler, but the semiconductor component is more likely to crack due to uneven stress distribution

Engineering Contradiction:
Improvebonding process simplicityVSAvoidcrack resistance
Core Design Contradiction:
Ease of manufactureVSStrength

Solution Approach 1:

The patent applies local quality by creating specific regions with different properties: regions with metal pads (thinner insulating film) and regions without metal pads (thicker insulating film). The bonded portions are strategically placed in the thicker insulating film regions to distribute stress evenly, preventing cracks while maintaining manufacturing simplicity.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The bonding face is segmented into multiple discrete bonded portions rather than a continuous bonding layer. Each bonded portion is independently positioned in the thicker insulating film region, which divides the stress distribution and prevents crack propagation across the entire bonding interface.

Inventive Principle:
Principle #1Segmentation

2Stability of the object's composition

If bonded portions are placed in regions without metal pads, then stress distribution is improved, but the bonding area is reduced

Engineering Contradiction:
Improvestress distributionVSAvoidbonding area
Core Design Contradiction:
Stability of the object's compositionVSArea of stationary object

Solution Approach 1:

The patent uses partial action by placing bonded portions only in specific regions (thicker insulating film regions) rather than covering the entire bonding face. This partial placement is sufficient to achieve the stress distribution goal while maintaining adequate bonding area through the distributed arrangement of multiple bonded portions.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The patent transitions from considering only the two-dimensional bonding area to incorporating the third dimension (insulating film thickness) as a critical factor. By placing bonded portions in regions with greater thickness, the patent utilizes the vertical dimension to improve stress distribution while maintaining horizontal bonding area.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Reliability

If bonded portions are arranged to intersect all straight lines parallel to the cleavage plane, then crack resistance in all directions is improved, but the arrangement complexity increases

Engineering Contradiction:
Improvecrack resistance in all directionsVSAvoidbonded portion arrangement
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent employs asymmetric arrangement of bonded portions that is specifically optimized for the cleavage plane direction. The bonded portions are positioned to intersect all straight lines parallel to the cleavage plane, creating an asymmetric pattern that provides enhanced crack resistance in the critical direction while maintaining reasonable manufacturing complexity.

Inventive Principle:
Principle #4Asymmetry

Data Source

PatentUS11342317B2Semiconductor apparatus and semiconductor wafer
Publication Date: 2022.05.24 CANON KK
  • US11342317B2 patent drawing
  • US11342317B2 patent drawing
  • US11342317B2 patent drawing

AI summary

A semiconductor apparatus comprises first and second semiconductor component having first and second metal pads, respectively. The first and second semiconductor components are stacked on each other to be bonded to each other at a bonding face. In a plane including the bonding face, first and second ranges each having a circular contour with a diameter of 10 μm or more are definable. None of bonded portions is provided inside of each of the first and second ranges. At least a part of the bonded portions is located between the first and second ranges. The bonded portions are disposed between the first and second ranges such that any straight line passing through the first and second ranges and parallel to a direction connecting centers of the first and second ranges intersects at least one bonded portion of the bonded portions.