Semiconductor Wafer Dicing with Laser-Formed Crack Separation
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Solution Overview
Problem
Mechanical dicing of semiconductor substrates using sawing blades often results in broken diced surfaces, leading to faults in semiconductor chips.
Innovation Solution
A method involving laser irradiation to form a modified layer within the semiconductor substrate along the dicing region, followed by polishing to propagate a crack perpendicular to a metal shield layer, separating integrated circuit regions into chips, with a metal shield layer preventing laser leakage or scattering.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If mechanical dicing using a sawing blade is performed, then the semiconductor substrate can be separated into chips, but the diced surface may break causing faults in semiconductor chips
Solution Approach 1:
The patent replaces the mechanical sawing blade system with a laser-based dicing system. The laser beam forms a modified layer within the semiconductor substrate through optical energy, which then propagates cracks to separate the substrate into chips without mechanical contact, eliminating the surface breakage caused by mechanical blades while maintaining high dicing efficiency
Solution Approach 2:
The patent changes the physical state and properties of the semiconductor substrate by irradiating laser energy to form a modified layer with altered structural parameters. This modified layer has different mechanical properties that enable controlled crack propagation, allowing clean separation without the physical contact that causes surface damage in mechanical dicing
2Manufacturing precision
If laser is used for dicing, then surface breakage is reduced, but laser may leak or scatter causing damage to integrated circuit regions
Solution Approach 1:
The patent introduces a metal shield layer as an intermediary component between the laser beam and the integrated circuit regions. This shield layer absorbs or blocks scattered laser energy, preventing it from reaching and damaging the sensitive circuit regions while allowing the laser to effectively form the modified layer in the dicing region
Solution Approach 2:
The patent segments the laser dicing process into distinct functional zones: the primary dicing region where the modified layer is formed, shielded regions where the metal shield layer blocks laser energy, and integrated circuit regions protected from laser exposure. This spatial segmentation allows precise control of laser energy distribution
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Reduces faults in semiconductor chips by minimizing laser-induced damage, improving electrical characteristics and production efficiency.
Implementation Method 1
forming a modified layer by irradiating laser to an inside of the semiconductor substrate along the dicing region
Implementation Method 2
propagating a crack from the modified layer in a direction perpendicular to a major-axial direction of the metal shield layer by polishing an inactive surface
Data Source
AI summary
There is provided a method of dicing a semiconductor wafer, which includes providing a semiconductor substrate having a plurality of integrated circuit regions on an active surface of the semiconductor substrate, a dicing regions provided between adjacent integrated circuit regions of the plurality of integrated circuit regions, and a metal shield layer provided on the active surface across at least a portion of the adjacent integrated circuit regions and the dicing region, forming a modified layer by irradiating laser to an inside of the semiconductor substrate along the dicing region, propagating a crack from the modified layer in a direction perpendicular to a major-axial direction of the metal shield layer by polishing an inactive surface opposing the active surface of the semiconductor substrate and forming semiconductor chips by separating the adjacent integrated circuit regions, respectively, based on the crack propagating from the modified layer.


