Semiconductor Wafer Stepped Back Surface for Compact MEMS Packaging

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Solution Overview

Problem

The challenge in semiconductor device manufacturing is to create compact, reliable, and cost-effective chip size packages that accommodate the increasing demand for smaller electronic devices, particularly in MEMS technology, while ensuring mechanical strength and ease of processing.

Innovation Solution

A semiconductor device with a semiconductor chip and a seal cap having a recess portion, forming an air seal, where the chip's back surface has a stepped portion with varying thickness to facilitate easier processing and packaging, and a method involving adhering wafers, grinding, and forming via-holes to create a compact, reliable package.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the semiconductor wafer is adhered to the cap wafer before thickness reduction, then the manufacturing steps are simplified and productivity is improved, but the mechanical strength during processing is reduced

Engineering Contradiction:
Improvemanufacturing efficiencyVSAvoidmechanical strength
Core Design Contradiction:
ProductivityVSStrength

Solution Approach 1:

The manufacturing process is divided into two stages: first reducing the thickness of individual semiconductor wafers to create stepped portions, then adhering the thinned wafers to cap wafers. This segmentation allows thickness reduction to be performed on smaller, more manageable units before bonding, resolving the contradiction between simplified manufacturing and mechanical strength during processing.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The thickness reduction and stepped portion formation are performed as preliminary actions before the wafer bonding step. By preparing the semiconductor wafers in advance with the required thickness profile, the subsequent bonding process becomes simpler and more efficient, while the mechanical strength issue is avoided since thinning occurs on standalone wafers with full structural integrity.

Inventive Principle:
Principle #10Preliminary action

2Shape

If the entire back surface is ground to reduce thickness, then the stepped portion can be formed, but the manufacturing complexity and cost increase

Engineering Contradiction:
Improvestepped portion geometryVSAvoidmanufacturing complexity
Core Design Contradiction:
ShapeVSEase of manufacture

Solution Approach 1:

Instead of grinding the entire back surface uniformly, the invention applies thickness reduction only to specific regions where stepped portions are needed. This local quality approach reduces manufacturing complexity by limiting the grinding operation to necessary areas only, while still achieving the required stepped geometry for the semiconductor device structure.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for the production of compact, reliable semiconductor devices with improved yield and reduced manufacturing costs, while maintaining mechanical strength and enhancing the longevity of MEMS devices by creating an air-tight or inert gas-filled cavity.

Implementation Method 1

grinding an entire surface of a back surface of the semiconductor wafer until a thickness of the semiconductor wafer reaches a predetermined value

Methodology Applied
Scientific EffectGrinding: Abrasion

Data Source

PatentUS7535097B2Semiconductor device and method of manufacturing the same
Publication Date: 2009.05.19 OLYMPUS CORPORATION(JP)
  • US7535097B2 patent drawing
  • US7535097B2 patent drawing
  • US7535097B2 patent drawing

AI summary

A semiconductor device includes a semiconductor chip having at least an electrode pad and a device formed on a semiconductor layer on its surface, a seal cap having a recess portion facing the device which is adhered to the surface of the semiconductor chip, and a cavity as an airspace formed by the recess portion between the semiconductor chip and the seal cap. The semiconductor chip includes a stepped portion at a portion of the back surface opposite the surface to have an uneven thickness.