Semiconductor Package Warpage Control via Insulating Layer Channels
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Solution Overview
Problem
Large semiconductor devices are prone to warpage due to thermal and mechanical stress, leading to joint defects, reduced reliability, and increased manufacturing costs.
Innovation Solution
A method involving the formation of a channel in the substrate around the semiconductor die, followed by the deposition of an underfill material and a heat spreader thermally connected to the substrate, which provides additional structural support and reduces warpage without increasing package volume or manufacturing time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If the substrate size is increased to accommodate large semiconductor die and provide adequate heat dissipation, then heat dissipation capability is improved, but substrate warpage increases due to thermal and mechanical stress
Solution Approach 1:
The patent divides the substrate into multiple regions by forming channels that segment the substrate structure. These channels create distinct zones that can independently manage thermal and mechanical stress, preventing uniform warpage across the entire large substrate while maintaining adequate heat dissipation pathways.
Solution Approach 2:
The patent applies local quality by creating channels with specific geometric characteristics (width, depth, spacing) in strategic locations around the semiconductor die. These localized structural modifications provide targeted stress relief and heat management in critical areas without compromising the overall substrate integrity or requiring a larger substrate size.
2Stability of the object's composition
If channels are formed in the substrate to reduce warpage, then substrate stability is improved, but device complexity increases
Solution Approach 1:
The patent utilizes the insulating layer as a flexible medium that can be easily patterned and formed into channels. This thin film approach allows for simple channel formation processes (such as photolithography and etching) compared to forming channels directly in the rigid substrate, thereby reducing the complexity of the manufacturing process while achieving the desired substrate stability.
3Stability of the object's composition
If underfill material is deposited in channels around the semiconductor die, then warpage control is improved, but manufacturing process complexity increases
Solution Approach 1:
The patent performs the channel formation in the insulating layer before mounting the semiconductor die and before depositing the underfill material. This preliminary action allows the channels to be pre-positioned and prepared, so that when underfill material is subsequently deposited, it naturally flows into and fills the pre-formed channels, providing warpage control without requiring complex post-assembly processes.
Solution Approach 2:
The insulating layer serves as an intermediary medium that facilitates the deposition of underfill material into the channels. By forming channels in this intermediate layer rather than directly in the substrate or attempting to inject material under the die, the patent simplifies the manufacturing process while achieving effective warpage control through the underfill material's placement in the channels.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces warpage of the substrate, enhancing the reliability of electrical connections and manufacturing yield while maintaining cost-effectiveness.
Implementation Method 1
the substrate is known to warp due to thermal and mechanical stress on the substrate
Implementation Method 2
a heat spreader or heat sink mounted over the die to dissipate heat
Data Source
AI summary
A semiconductor device has a substrate. An insulating layer is formed over a surface of the substrate. A semiconductor die is mounted over the surface of the substrate. A channel is formed in the insulating layer around the semiconductor die. An underfill material is deposited between the semiconductor die and the substrate and in the channel. A heat spreader is mounted over the semiconductor die with the heat spreader thermally connected to the substrate. A thermal interface material is formed over the semiconductor die. The underfill material is deposited between the semiconductor die and the substrate along a first edge of the semiconductor die and along a second edge of the semiconductor die opposite the first edge. The channel extends partially through the insulating layer formed over the substrate with the insulating layer maintaining coverage over the substrate within a footprint of the channel.