Semiconductor Interconnect Waveguide Signal Transmission

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Solution Overview

Problem

The complexity of manufacturing miniaturized semiconductor devices leads to issues such as poor structural configuration and delamination, resulting in high yield loss and increased manufacturing costs, due to the challenges in integrating multiple semiconductor chips with efficient communication capabilities.

Innovation Solution

A semiconductor structure is developed with a substrate, interconnect structure, waveguide, and conductive members that convert electrical signals to electromagnetic signals for high-frequency transmission, minimizing energy loss and enabling ultra-high speed signal transmission between semiconductor chips.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple semiconductor chips are integrated into a miniaturized device using CoWoS technology, then the functionality and integration density are improved, but the manufacturing complexity increases leading to structural defects and delamination

Engineering Contradiction:
Improveintegration densityVSAvoidmanufacturing complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent divides the semiconductor device into multiple functional layers including substrate, interconnect structure, waveguide, and chip components. This segmentation allows each layer to be manufactured and tested independently before assembly, reducing the complexity of manufacturing the entire miniaturized device while maintaining high integration density.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces waveguide-based optical interconnects that transmit signals in three-dimensional space through the substrate, adding a spatial dimension to signal transmission. This dimensional approach enables efficient communication between chips without increasing lateral footprint, thus maintaining miniaturization while improving integration capability.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Volume of moving object

If the semiconductor device is miniaturized to reduce size, then the portability and application versatility are improved, but the manufacturing precision requirements increase leading to higher yield loss

Engineering Contradiction:
Improvedevice sizeVSAvoidmanufacturing precision
Core Design Contradiction:
Volume of moving objectVSManufacturing precision

Solution Approach 1:

The patent replaces traditional electrical interconnects with waveguide-based optical transmission systems. This substitution eliminates the need for precise mechanical alignment of electrical contacts, as optical signals can be transmitted through the waveguide structure with greater tolerance, thereby reducing manufacturing precision requirements while maintaining miniaturized device size.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Ease of manufacture

If traditional electrical interconnects are used for signal transmission between chips, then the manufacturing process is simpler, but the energy loss and transmission speed limitations occur

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidsignal energy loss
Core Design Contradiction:
Ease of manufactureVSLoss of energy

Solution Approach 1:

The patent substitutes electrical signal transmission with optical signal transmission through waveguides. Optical signals experience lower attenuation and energy loss compared to electrical signals, especially over longer distances within the device. This substitution maintains manufacturing simplicity while significantly reducing energy loss and increasing transmission speed.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

4Adaptability or versatility

If more manufacturing operations are implemented to enhance functionality, then the device capability is improved, but the delamination and structural defects increase

Engineering Contradiction:
Improvedevice functionalityVSAvoidstructural integrity
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent incorporates test structures and validation mechanisms during the manufacturing process to detect potential delamination and structural defects early. By performing preliminary testing and validation at intermediate stages, the manufacturing process can identify and correct issues before they propagate, thereby maintaining structural integrity while enabling enhanced device functionality through additional manufacturing operations.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution enhances communication efficiency between semiconductor chips, improving transmission speed and reducing energy loss, thereby addressing the manufacturing challenges and performance limitations of miniaturized semiconductor devices.

Implementation Method 1

convert electrical signals to electromagnetic signals for high-frequency transmission, minimizing energy loss

Methodology Applied
Scientific EffectElectromagnetic signal transmission: Electromagnetic Induction

Data Source

PatentUS10319690B2Semiconductor structure and manufacturing method thereof
Publication Date: 2019.06.11 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US10319690B2 patent drawing
  • US10319690B2 patent drawing
  • US10319690B2 patent drawing

AI summary

A semiconductor structure includes a substrate; an interconnect structure formed over the substrate and including a dielectric layer over the substrate, a first conductive member formed within the dielectric layer and a second conductive member formed within the dielectric layer; a waveguide formed between the first conductive member and the second conductive member; a first die disposed over the interconnect structure and electrically connected to the first conductive member; and a second die disposed over the interconnect structure and electrically connected to the second conductive member, wherein the waveguide is coupled with the first conductive member and the second conductive member.