Semiconductor Well Mitigation Regions for High Voltage Punch-Through
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Solution Overview
Problem
Existing semiconductor structures face challenges in maintaining a high breakdown voltage, leading to potential electrical punch-through and device failure, especially when the operation voltage is high and the breakdown voltage between conductivity type wells is low.
Innovation Solution
Incorporation of mitigation regions with specific conductivity types in semiconductor wells and a barrier layer to increase breakdown voltage, allowing the mitigation regions to penetrate vertically and be positioned near the boundary between conductivity type wells, thereby enhancing the breakdown voltage and operation voltage range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If the operation voltage is increased to expand the voltage range, then the power handling capability is improved, but electrical punch-through occurs between conductivity type wells causing device failure
Solution Approach 1:
An intermediate layer with third conductivity type is introduced between the first conductivity type well and the second conductivity type well. This intermediate layer acts as a mediator that prevents direct electrical punch-through between the opposing conductivity type wells, enabling the device to operate at higher voltages without failure.
Solution Approach 2:
The well structure is segmented into multiple regions with different conductivity types. Instead of a direct interface between first and second conductivity type wells, the structure is divided into first conductivity type well, intermediate layer with third conductivity type, and second conductivity type well, creating stepped doping regions that prevent punch-through.
Data Source
AI summary
The invention provides a semiconductor structure and a semiconductor device having such semiconductor structure. The semiconductor structure includes: a substrate; a first well having a first conductivity type, which is provided on the substrate; a second well having a second conductivity type and contacting the first well at a boundary in between in a lateral direction; and a plurality of mitigation regions having the first conductivity type or the second conductivity type, provided in the first well and being close to the boundary in a lateral direction and penetrating the first well in a vertical direction.


