Semiconductor Wiring Line Sidewall Transfer Sub-Resolution Patterning

Solution Overview

Problem

The existing sidewall transfer methods in semiconductor manufacturing face challenges in forming wiring line patterns smaller than the minimum feature size, as the loop cut process using photolithography is difficult due to size constraints and results in area penalties when trying to expose mask patterns around closed loop patterns.

Innovation Solution

The method employs a sidewall transfer process using an inverse loading effect to form groove and wiring line patterns without photolithography, allowing for the creation of patterns smaller than the minimum feature size by adjusting the width of space regions between sidewall films to achieve electrical isolation between elements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a loop cut mask pattern is formed using photolithography to perform the loop cut process, then the wiring lines can be electrically isolated, but the minimum feature size constraint prevents exposure of mask patterns around closed loop patterns smaller than the resolution limit

Engineering Contradiction:

Improvewiring line pattern sizeVSAvoidphotolithography exposure feasibility

Core Design Contradiction:

Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The patent inverts the conventional approach by forming the loop cut pattern through sidewall material deposition and anisotropic etching rather than direct photolithography exposure. The sidewall material is deposited conformally around the core material, and the loop cut is achieved by selective removal of core material at end portions, allowing sub-resolution patterning.

Inventive Principle:

Principle #13The other way round (Inversion)

Solution Approach 2:

The patent introduces sidewall material as an intermediary element that enables pattern formation below the photolithography resolution limit. The sidewall material serves as a mediator between the core material and the final wiring line pattern, allowing precise definition of sub-resolution features through conformal deposition and selective etching processes.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Ease of manufacture

If a margin is obtained around the closed loop pattern to enable photolithography exposure, then the mask pattern can be exposed, but the area penalty increases

Engineering Contradiction:

Improvemask pattern exposure feasibilityVSAvoidarea penalty

Core Design Contradiction:

Ease of manufactureVSArea of stationary object

Solution Approach 1:

The patent inverts the conventional approach by forming the loop cut pattern through sidewall material deposition and anisotropic etching rather than direct photolithography exposure. The sidewall material is deposited conformally around the core material, and the loop cut is achieved by selective removal of core material at end portions, allowing sub-resolution patterning.

Inventive Principle:

Principle #13The other way round (Inversion)

Solution Approach 2:

The patent replaces the optical system of photolithography with a mechanical/chemical system involving conformal film deposition and anisotropic etching. This substitution allows pattern formation defined by film thickness and etch selectivity rather than optical resolution, eliminating the need for margin areas.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

3Productivity

If the closed loop pattern size is reduced below the minimum feature size, then higher integration density is achieved, but photolithography can no longer expose the mask pattern

Engineering Contradiction:

Improveintegration densityVSAvoidpattern formation capability

Core Design Contradiction:

ProductivityVSManufacturing precision

Solution Approach 1:

The patent inverts the conventional approach by forming the loop cut pattern through sidewall material deposition and anisotropic etching rather than direct photolithography exposure. The sidewall material is deposited conformally around the core material, and the loop cut is achieved by selective removal of core material at end portions, allowing sub-resolution patterning.

Inventive Principle:

Principle #13The other way round (Inversion)

Solution Approach 2:

The patent changes the controlling parameters from optical wavelength and numerical aperture (photolithography) to film deposition thickness and etch selectivity (sidewall transfer). This parameter change enables pattern definition at dimensions below the optical resolution limit while maintaining manufacturing precision through controlled material deposition and removal.

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS10483202B2Semiconductor device having a wiring line with an end portion having rounded side surfaces and manufacturing method thereof

Publication Date: 2019.11.19 KIOXIA CORP

AI summary

A semiconductor device includes a first to a third wiring-line. The first wiring-line is provided on a first layer in a first direction. The second wiring-line is provided on the first layer in the first direction. A first side surface of the second wiring-line faces the first wiring-line. A second side surface of the second wiring-line is opposite to the first side surface. The third wiring-line is provided on the first layer in the first direction, and faces the second side surface of the second wiring-line. An end portion of the first wiring-line projects further from an end portion of the second wiring-line in the first direction. The end portion of the second wiring-line projects further from an end portion of the third wiring-line in the first direction, and curves toward the third wiring-line. Alternatively, the end portion of the second wiring-line increases in width toward its edge portion.