Semiconductor Wiring Layout for Uniform Plating Thickness

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Solution Overview

Problem

In back-illuminated solid-state imaging elements, variations in wiring density lead to uneven wiring heights due to electrolytic plating, resulting in packaging challenges and increased package thickness, necessitating a solution to prevent such variations.

Innovation Solution

A semiconductor device with a substrate, a wiring layer, and through electrodes that connect wirings on opposite surfaces, featuring a recess-protrusion formation region with non-through holes to adjust film thickness uniformly, reducing wiring density variations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If electrolytic plating is used to form wiring, then wiring can be formed efficiently, but wiring height becomes uneven due to density variations

Engineering Contradiction:
Improvewiring formation efficiencyVSAvoidwiring height uniformity
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by forming a recess-protrusion structure on the substrate surface before performing electrolytic plating. This pre-structured surface compensates for expected height variations during plating, ensuring uniform final wiring height. The recess regions are specifically designed to receive excess plating material in sparse wiring areas, preventing height unevenness before it occurs.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements local quality by creating different surface topographies (recess and protrusion regions) in different areas of the substrate. The recess regions are strategically placed where wiring density is sparse to prevent excessive height buildup, while protrusion regions are placed where wiring is dense to prevent insufficient height. This localized surface modification ensures uniform wiring height across the entire substrate despite varying wiring densities.

Inventive Principle:
Principle #3Local quality

2Adaptability or versatility

If wiring density varies due to layout limitations, then wiring can be designed flexibly, but packaging complexity increases due to height differences

Engineering Contradiction:
Improvewiring layout flexibilityVSAvoidpackaging complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by pre-forming the recess-protrusion structure on the substrate before wiring layout is finalized. This allows flexible wiring density variations in different regions without subsequent height compensation steps. The recess regions are pre-positioned to accommodate sparse wiring areas, eliminating the need for complex packaging solutions to compensate for height variations.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent extracts the height compensation function from the packaging process and transfers it to the substrate preparation stage. By forming recess regions that pre-compensate for height variations, the patent removes the need for complex packaging structures designed to accommodate uneven wiring surfaces, thereby simplifying the overall device structure.

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively prevents wiring height variations, ensuring uniform film thickness and reducing packaging complexities, thereby enhancing the reliability and efficiency of the semiconductor device.

Implementation Method 1

a through electrode that connects a second wiring in the wiring layer and the first wiring and penetrates the substrate

Methodology Applied
Scientific EffectConduction (electrical): Conduction (electrical)

Implementation Method 2

wiring to extract signals from the wiring layer is formed, for example, on the substrate of the first semiconductor element by an electrolytic plating method

Methodology Applied
Scientific EffectElectrolytic plating: Electroplating

Data Source

PatentUS20240297196A1Semiconductor device and imaging device
Publication Date: 2024.09.05 SONY SEMICON SOLUTIONS CORP
  • US20240297196A1 patent drawing
  • US20240297196A1 patent drawing
  • US20240297196A1 patent drawing

AI summary

The present technology relates to a semiconductor device and an imaging device capable of preventing the film thickness of wiring from becoming uneven. The semiconductor device includes: a substrate; a wiring layer on a first surface of the substrate; a first wiring provided on a second surface opposite the first surface of the substrate; and a through electrode that connects a second wiring in the wiring layer and the first wiring and penetrates the substrate, in which a part of the first wiring has a region in an uneven shape. The uneven shape is a non-through hole that does not penetrate the substrate. The present technology can be applied to, for example, a semiconductor device having a structure in which a plurality of chips is stacked and wiring layers are connected to each other.