Semiconductor Work Function Layer Design for Threshold Voltage Control
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Solution Overview
Problem
The high integration of semiconductor devices with multiple transistors having different threshold voltages is disadvantageous in terms of mass production efficiency, leading to scattering of electrical characteristics due to the increased number of processes involved.
Innovation Solution
A semiconductor device design incorporating a substrate with multiple transistors, each with distinct threshold voltages, featuring a specific layer structure for the gate electrodes and dielectric layers, including high-k dielectrics and work function layers such as TiON, TiN, TiON, TiN, and TiAlC, which enhances electrical characteristics and production efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple transistors with different threshold voltages are disposed on a substrate using sequential processes, then device functionality is achieved, but mass production efficiency deteriorates and electrical characteristic scattering increases
Solution Approach 1:
The patent merges the formation of multiple transistors with different threshold voltages into a single unified process sequence. All transistors are formed simultaneously using the same gate electrode deposition, dielectric layer formation, and doping processes, eliminating the need for separate sequential processing steps for each transistor type.
Solution Approach 2:
The patent applies local quality by introducing different dopant types (first dopant for N-type, second dopant for P-type) and different dielectric materials (first dielectric with first breakdown voltage, second dielectric with second breakdown voltage) into specific regions of the gate electrode structure. This allows each transistor region to have locally optimized properties while using the same overall process sequence.
2Adaptability or versatility
If multiple sequential processes are used to create transistors with different threshold voltages, then device functionality is achieved, but process complexity increases
Solution Approach 1:
The patent combines multiple previously separate process sequences into a single integrated process flow. The gate electrode is formed once and then selectively modified in different regions through localized doping and dielectric deposition, rather than requiring separate gate electrode formation processes for each transistor type.
Solution Approach 2:
The patent segments the gate electrode structure into different functional regions that receive different treatments. The gate electrode is divided into first and second regions that are selectively doped with different dopants and covered with different dielectric materials, allowing complex functionality to be achieved through localized modifications of a unified structure.
Data Source
AI summary
A semiconductor device includes first and second transistors on a substrate. The first transistor includes a first N-type active region, a first gate electrode having a first work function layer, and a first gate dielectric layer having high-k dielectrics containing La. The first work function layer includes a first layer having TiON, a second layer having TiN or TiON, a third layer having TiON, a fourth layer having TiN, and a fifth layer having TiAlC. The second transistor includes a first P-type active region, a second gate electrode having a second work function layer, and a second gate dielectric layer having high-k dielectrics. The second work function layer includes the fifth layer directly contacting the second gate dielectric layer.