Sense Amplifier Stages for Capacitive Mismatch Reduction
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Solution Overview
Problem
Conventional sense amplifier circuits face challenges in reading memory cell states quickly and accurately, especially when bit-lines are long and the current difference between cell and reference currents is small, due to the influence of spurious capacitive currents generated during transient behavior, which can lead to incorrect data acquisition.
Innovation Solution
A sense amplifier circuit with two parallel folded stages is designed, where the capacitive current components from each stage cancel each other out, allowing for fast and accurate reading of memory cell states by merging the opposite behaviors of the stages and optimizing the layout to equalize parasitic capacitance values, thus eliminating the impact of spurious currents.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a conventional sense amplifier circuit is used with long bit-lines, then the reading speed is reduced due to spurious capacitive currents during transient behavior, but increasing the current difference between cell and reference currents would reduce the accuracy of reading small current differences
Solution Approach 1:
The sense amplifier circuit is divided into two parallel folded stages that operate simultaneously. Each stage processes the current comparison independently, and their outputs are combined by the comparator. This segmentation allows the circuit to handle transient capacitive currents in each stage while maintaining accurate measurement of small current differences through the parallel processing architecture.
Solution Approach 2:
The patent merges the outputs of two parallel folded stages by feeding them into a comparator that evaluates the voltage difference between the stages. This combining approach allows the circuit to cancel out spurious capacitive current effects while maintaining the ability to detect small current differences, as the merged output reflects the true current difference rather than transient artifacts.
2Loss of time
If the current difference between cell and reference currents is made larger to improve reading speed, then the reading time is reduced, but the accuracy of detecting small current differences deteriorates
Solution Approach 1:
The sense amplifier is segmented into two parallel folded stages that simultaneously process the current comparison. This segmentation allows the circuit to achieve faster reading speeds through parallel processing while maintaining high accuracy for small current differences, as each stage independently processes the signal and the comparator combines their results.
Solution Approach 2:
The patent introduces a second dimension of processing by creating parallel folded stages that operate simultaneously with the main current comparison. This dimensional expansion allows the circuit to achieve both fast reading speeds and high precision by processing information through multiple paths and combining their outputs.
3Measurement precision
If spurious capacitive currents are allowed to fade out before reading, then the measurement accuracy is improved, but the reading time is significantly increased
Solution Approach 1:
The patent performs preliminary action by simultaneously processing the current comparison in parallel folded stages while the transient capacitive currents are still present. Instead of waiting for spurious currents to fade out, the circuit proactively processes the signal in a way that cancels out the transient effects, achieving both fast reading and high accuracy.
Solution Approach 2:
The patent converts the harmful spurious capacitive currents into a beneficial effect by using the parallel folded stages to simultaneously process the signal during the transient period. The comparator evaluates the voltage difference between stages, which cancels out the spurious currents' impact, turning the previously harmful transient behavior into an acceptable or even advantageous condition for fast reading.
Data Source
AI summary
A sense amplifier circuit for reading the state of memory cells. In one aspect of the invention, the sense amplifier circuit includes a first stage receiving a cell current derived from the memory cell and a reference current derived from a reference cell, and a second stage receiving the cell current and the reference current. A comparator, coupled to the first stage and the second stage, provides an output indicative of the state of the memory cell based on a difference of the voltages provided by the first stage and the second stage, where the state indicated by the comparator is substantially unaffected by capacitive current components provided by transient behavior of the first and second stages.