Sense Amplifier Control Circuit Noise Reduction
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Solution Overview
Problem
The existing semiconductor memory devices face a reduction in operation margin due to noise in the voltage supplied by the sense amplifier control circuit, which increases the length of connections between the bit line sense amplifiers and the control circuit, leading to inefficiencies as the cell array region expands.
Innovation Solution
Integrating sense amplifier control circuits within the BLSA array region to supply precharge voltage directly to the bit line sense amplifiers, and including additional control circuits in sub-holes to manage sense amplifier power and ground voltages, reducing the length of connections and noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the cell array region is expanded to increase yield, then the production capacity is improved, but the connection length between BLSAs and sense amplifier control circuit increases causing noise
Solution Approach 1:
The sense amplifier control circuit is divided into multiple instances distributed across different regions. Each BLSA array has its own dedicated sense amplifier control circuit instance, preventing long interconnect lines and reducing noise while allowing the cell array to be expanded for higher yield.
Solution Approach 2:
The sense amplifier control circuit instances are strategically positioned in both the BLSA array region and sub-hole regions, utilizing two-dimensional spatial distribution. This dimensional arrangement optimizes the connection geometry, keeping interconnect lengths short regardless of cell array expansion in any direction.
2Object-affected harmful factors
If the connection length between BLSAs and sense amplifier control circuit is reduced, then the noise is minimized, but the layout flexibility is reduced
Solution Approach 1:
The sense amplifier control circuit is designed as a universal module that can be instantiated in multiple locations (both BLSA array region and sub-hole region). This multi-functional placement strategy maintains short connection lengths for noise reduction while providing layout flexibility to adapt to different memory device configurations.
Data Source
AI summary
A sense amplifier control circuit according to the present invention is disposed in a bit line sense amplifier (BLSA) array region including a plurality of BLSAs and is configured to supply a precharge voltage to the plurality of BLSAs in response to a control signal.