Sense Amplifier Offset Cancellation via Current Mirror Storage
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The performance of semiconductor memories is adversely affected by the mismatch of transistors in sense amplifiers, leading to imbalanced voltage and errors in data reading, which existing technologies attempt to address through offset compensation but at the cost of slow reading speed and high power consumption.
Innovation Solution
A sense amplifier with an offset voltage storage unit and a current mirror structure that stores and compensates for the offset voltage, allowing for accurate data reading while reducing power consumption by integrating the offset cancellation and pre-charge stages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If offset compensation is performed using conventional methods to address transistor mismatch, then reading accuracy is improved, but reading speed decreases and power consumption increases
Solution Approach 1:
The patent performs offset cancellation in advance during a dedicated offset cancellation stage before the actual read operation. The offset voltage is detected and stored in an offset storage capacitor during this preliminary stage, so that when the read operation occurs, the offset has already been compensated for, enabling fast and accurate reading without delay
Solution Approach 2:
The patent divides the sense amplifier operation into distinct stages: an offset cancellation stage and a read stage. During the offset cancellation stage, only offset compensation is performed while bit line precharging is suspended. This segmentation allows the offset cancellation to complete fully before the read operation begins, improving both accuracy and speed
2Measurement precision
If offset compensation is performed using conventional methods to address transistor mismatch, then reading accuracy is improved, but power consumption increases
Solution Approach 1:
The offset cancellation is performed in advance during a dedicated stage before the read operation. By completing the power-intensive offset detection and storage beforehand, the actual read operation can proceed with lower power consumption, as the offset compensation is already in place and does not need to be continuously maintained during reading
Solution Approach 2:
The patent separates offset cancellation from the read operation into distinct time periods and operational modes. During the offset cancellation stage, power is concentrated on offset detection and storage while bit line precharging is suspended. This segmentation prevents simultaneous high-power operations, reducing overall power consumption while maintaining reading accuracy
3Quantity of substance
If transistor size is reduced to increase memory density, then memory capacity is improved, but transistor mismatch increases causing voltage imbalance
Solution Approach 1:
The sense amplifier performs self-diagnosis and self-correction by automatically detecting its own offset voltage through the current mirror comparison and automatically compensating for it by storing the detected offset in the offset storage capacitor. This self-service mechanism allows the amplifier to correct its own voltage imbalance caused by transistor mismatch, maintaining reliability even as transistor sizes are reduced for higher density
Solution Approach 2:
The patent implements a feedback mechanism where the output of the amplification module is fed back to the input through the offset storage capacitor. The detected offset voltage is continuously fed back and compensated during the offset cancellation stage, creating a closed-loop system that automatically corrects voltage imbalance caused by transistor mismatch, ensuring reliable operation at smaller transistor sizes
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution significantly reduces the impact of transistor mismatch on data reading, enhancing the performance of semiconductor memories by improving reading speed and reducing power consumption.
Implementation Method 1
In an offset cancellation stage of the sense amplifier, the sense amplifier is configured to include a current mirror structure to store an offset voltage of the amplification module in the offset voltage storage unit
Data Source
AI summary
The present disclosure provides a sense amplifier, a memory, and a method for controlling a sense amplifier, relating to the technical field of semiconductor memories. The sense amplifier comprises: an amplification module; and an offset voltage storage unit electrically connected to the amplification module; wherein, in an offset cancellation stage of the sense amplifier, the sense amplifier is configured to comprise a current mirror structure to store an offset voltage of the amplification module in an offset voltage storage unit. The present disclosure can realize the offset cancellation of the sense amplifier.