Sense Amplifier In-Memory Logical NOT Operation
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Solution Overview
Problem
Conventional memory devices face a data transmission bottleneck due to the von Neumann architecture, leading to inefficiencies in data processing between the central processing unit and the memory device.
Innovation Solution
A sense amplifier capable of performing a logical NOT operation is introduced, comprising a sense circuit and three transistors. This amplifier senses voltages on bit lines and inverse bit lines, allowing it to perform in-memory computing and alleviate data transmission bottlenecks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If Von Neumann architecture is used for data transmission between CPU and memory device, then data transmission structure is simple, but data transmission bottleneck occurs leading to low processing efficiency
Solution Approach 1:
The patent combines memory storage function with logic operation function in the same memory device. The sense amplifier circuit performs logical NOT operations directly on data stored in memory cells, merging what were previously separate functions (storage in memory, processing in CPU) into a unified system, thereby reducing data transmission time and improving processing efficiency
Solution Approach 2:
The patent introduces in-memory computing capability as a new dimension to traditional memory devices. By enabling logic operations within the memory device itself rather than only through external CPU processing, it transforms the memory device from a passive storage component to an active processing-storage hybrid, reducing the von Neumann bottleneck
2Adaptability or versatility
If sense amplifier performs only traditional sensing function, then circuit structure is simple, but in-memory computing capability is lacking
Solution Approach 1:
The sense amplifier is designed to perform multiple functions: traditional voltage sensing and new logic operation functions (specifically logical NOT operations). By integrating additional transistors (third and fourth transistors) and configuring them with appropriate gates, the same circuit structure can switch between sensing mode and logic operation mode, achieving multi-functionality without requiring completely separate circuits
Solution Approach 2:
The memory device performs logic operations on its own stored data without requiring external CPU intervention. The sense amplifier uses the memory device's internal resources (bit lines, word lines, memory cells) to execute logical NOT operations, allowing the system to serve its own processing needs and reducing dependency on external computing resources
Data Source
AI summary
A sense amplifier capable of performing a logical NOT operation is provided, which includes a sense circuit, configured to sense a first voltage of a bit line and a second voltage of an inverse bit line; a first transistor, coupled between a first terminal of the sense circuit and the bit line; a second transistor, coupled between a second terminal of the sense circuit and the inverse bit line; and a third transistor, coupled between the bit line and the inverse bit line. First and second memory cells are respectively controlled by first and second word lines, and connected to the bit line. When the sense amplifier is in an inverse writing state, the sense amplifier writes the second voltage to the second memory cell through a predetermined path. A first logical state of the first voltage is complementary to a second logical state of the second voltage.