Sense Amplifier Latch Biasing for Low-Standby Memory Page Buffers

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Solution Overview

Problem

High standby current consumption in memory devices due to continuous bias voltage supply to sense amplifier and data latches during standby mode leads to increased power consumption.

Innovation Solution

Segregate the power domain of the sense amplifier latch from the data latches and apply different bias voltage levels to each, reducing or turning off the voltage to the sense amplifier latch during standby mode to minimize current consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If continuous bias voltage is supplied to sense amplifier latch and data latches during standby mode, then data storage capability is maintained, but standby current consumption increases

Engineering Contradiction:

Improvedata storage capabilityVSAvoidstandby current consumption

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent divides the power supply system into separate domains: the sense amplifier latch remains in a first power domain with higher bias voltage for reliable data storage, while data latches are moved to a second power domain with lower or zero bias voltage during standby mode. This segmentation allows independent voltage control for different functional requirements.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different bias voltage levels are applied to different components based on their specific requirements: the sense amplifier latch receives higher bias voltage to maintain data integrity, while data latches receive reduced or zero voltage during standby. This local differentiation optimizes both data reliability and power consumption.

Inventive Principle:

Principle #3Local quality

2Use of energy by moving object

If separate power domains are created for sense amplifier latch and data latches, then standby current is reduced, but device complexity increases

Engineering Contradiction:

Improvestandby currentVSAvoidpower domain segmentation

Core Design Contradiction:

Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The power management circuit is designed to handle multiple functions: it can supply different voltage levels to different domains, transition between standby and active modes, and manage both sense amplifier latch and data latch power independently. This multi-functionality reduces the need for separate dedicated circuits.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The power domains are dynamically controlled based on operational state. During standby mode, the second power domain is activated with reduced voltage for data latches, while during active operations, both domains receive appropriate voltages. This dynamic adjustment optimizes power consumption without requiring permanent complex infrastructure.

Inventive Principle:

Principle #15Dynamics

Data Source

PatentUS12573461B2Managing sense amplifier latch and data latch voltage to reduce standby current

Publication Date: 2026.03.10 MICRON TECHNOLOGY INC

AI summary

Entry of a memory device into a standby mode is determined. During the standby mode of the memory device, a first bias voltage level is caused to be applied to a sense amplifier latch of a sense amplifier of a page buffer circuit of the memory device. During the standby mode, a second bias voltage level is caused to be applied to a set of data latches of the sense amplifier of the page buffer circuit of the memory device, wherein the second bias voltage level is different from the first bias voltage level.