Sense Amplifier Latch Segmentation for Leakage Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Memory devices, such as DRAM, face challenges in reducing leakage current during active idle modes, which affects power consumption and efficiency in memory operations.
Innovation Solution
The implementation of a sense amplifier with independently controllable primary and holding latches, along with a connectivity control circuit, allows for a low leakage mode by decoupling the primary latch from bitlines during active idle states, using transistors with higher threshold voltages in the holding latch to maintain voltage without leakage current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the primary latch remains connected to bitlines during active idle mode, then the sense amplifier can quickly respond to the next memory access, but leakage current increases through the primary latch
Solution Approach 1:
The sense amplifier is divided into two independent latches: a primary latch for fast sensing and a holding latch for data retention. This segmentation allows the primary latch to be disconnected from bitlines during active idle mode to reduce leakage, while the holding latch maintains the differential voltage. The connectivity control circuit manages the independent operation of these segmented components, enabling the primary latch to be turned off without affecting data storage.
Solution Approach 2:
The holding latch acts as an intermediary between the primary latch and the bitlines during active idle mode. When the primary latch is disconnected to reduce leakage, the holding latch maintains the differential voltage and can quickly transfer it back to the bitlines when needed. This intermediary structure enables the primary latch to remain off during idle periods while preserving fast response capability through the holding latch.
2Loss of energy
If transistors with higher threshold voltages are used in the holding latch, then leakage current is reduced, but the transistor size must increase to maintain drive current
Solution Approach 1:
The sense amplifier functionality is segmented into two specialized latches with different transistor characteristics. The primary latch uses standard transistors optimized for fast switching, while the holding latch uses high-threshold voltage transistors optimized for low leakage. This segmentation allows each latch to be independently optimized for its specific function without compromising the other, resolving the trade-off between leakage reduction and transistor area.
Data Source
AI summary
A sense amplifier for a memory device includes a primary latch and a holding latch that are independently controllable. The primary latch comprises a first set of transistors and the holding latch includes a second set of transistors having higher threshold voltages than the first set of transistors. In conjunction with a memory access operation, the primary latch and the holding latch sense and amplify a differential voltage of a pair of bitlines. A connectivity control circuit controls connectivity of the primary latch in different operational modes including pre-charge, offset pre-compensation, and amplification. In an active idle mode in between memory access operations while the wordline may remain active, the connectivity control circuit may turn off the primary latch while the holding latch holds the differential voltage on the bitlines to avoid leakage current through the primary latch.