Sense Amplification Circuit for High-Speed Nonvolatile Memory Output
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Solution Overview
Problem
Current semiconductor memory devices face challenges in achieving high-speed data output operations while maintaining a reduced layout area, particularly in nonvolatile memory devices used in various digital applications.
Innovation Solution
The implementation of an output circuit that includes page buffer latches, sub-data lines, a data line, a reference data line, and a sense amplification circuit capable of differentially sensing voltage differences between the data and reference lines, with a current path generator controlling the voltage variations to facilitate efficient data output.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional output circuits are used, then layout area is larger, but data output speed is slower
Solution Approach 1:
The output circuit is segmented into multiple sense amplification circuits, each handling a portion of the data output task. This segmentation allows parallel processing of data bits, increasing overall data output speed while each individual circuit maintains a compact design to control total layout area.
Solution Approach 2:
The patent transitions from single-ended sensing to differential sensing, adding a reference dimension to the sensing operation. By introducing reference data lines and sense amplification circuits that compare differential voltages, the system achieves faster sensing speeds while the differential structure is arranged compactly to minimize layout area expansion.
2Area of stationary object
If layout area is reduced, then device size is smaller, but data output speed decreases
Solution Approach 1:
Multiple sense amplification circuits are merged into a unified differential sensing architecture. By combining the sensing operations and sharing common circuit elements such as precharge circuits and current sources, the design achieves high-speed parallel data output while reducing the total layout area compared to having separate independent sensing circuits.
Solution Approach 2:
The sense amplification circuit is designed with multi-functionality, serving both as a precharge circuit and a differential sense amplifier. The same circuit structure handles both reference data line precharging and data sensing operations, reducing the number of separate components needed and thereby minimizing layout area while maintaining high-speed performance.
3Speed
If differential sensing is implemented, then data output speed increases, but circuit complexity increases
Solution Approach 1:
Differential sensing is implemented with local quality by providing dedicated reference data lines and sense amplification circuits for each data line. Each local sensing unit is designed with consistent structure and parameters, allowing modular replication that increases data output speed while keeping individual unit complexity manageable through standardization.
Solution Approach 2:
The precharge circuit performs preliminary action by precharging the reference data line before the sensing operation begins. This preliminary precharging action, performed in a controlled manner before data is applied to the data line, enables faster differential sensing by eliminating the need to charge the reference line during the critical sensing window, thereby increasing data output speed without proportionally increasing circuit complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables high-speed data output operations while reducing the layout area by effectively sensing and processing data through differential sensing, enhancing the performance and efficiency of nonvolatile memory devices.
Implementation Method 1
a sense amplification circuit configured to differentially sense the reference data line and the data line, and to output data corresponding to the sensing result
Data Source
AI summary
An output circuit of a nonvolatile memory device includes a sense amplification circuit configured to, during a sensing operation, generate output data based on a comparison between a first voltage on a data line and a reference voltage on a reference data line during a sensing operation, the first voltage corresponding to data read from at least one memory cell, and the sense amplification circuit being further configured to connect the reference data line with a ground terminal during the sensing operation.


