Sense Amplifier Negative Pull-Down Voltage

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Solution Overview

Problem

Sense amplifiers in memory devices face challenges with output drive degradation and reduced differential voltages due to shrinking memory cell sizes, leading to insufficient amplification and increased sensitivity to timing variations, which affects the read window and overall performance.

Innovation Solution

Implementing a negative source voltage pulsing technique during pre-sense operations to maintain the gate-source terminal voltage of n-channel sense amplifiers above the threshold level, using n-channel-centric compensation instead of combined n-channel and p-channel compensation, and employing a lower reference voltage to enhance drive strength without increasing footprint.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If sense amplifier size is reduced to meet array efficiency targets, then area is improved, but output drive strength degrades and differential voltages are reduced

Engineering Contradiction:
Improvesense amplifier areaVSAvoidoutput drive strength
Core Design Contradiction:
Area of stationary objectVSStrength

Solution Approach 1:

The patent changes the voltage parameter by introducing a negative voltage source connected to the source terminal of the n-channel sense amplifier. This parameter change allows the amplifier to maintain higher drive strength with reduced sizing by creating a larger voltage differential across the channel, effectively compensating for the reduced device dimensions.

Inventive Principle:
Principle #35Parameter changes

2Area of stationary object

If sense amplifier size is reduced, then area is improved, but amplification capability becomes insufficient and sensing speed decreases

Engineering Contradiction:
Improvesense amplifier areaVSAvoidsensing speed
Core Design Contradiction:
Area of stationary objectVSProductivity

Solution Approach 1:

By applying a negative voltage to the source terminal, the patent increases the gate-source voltage differential, which enhances the transconductance and switching speed of the n-channel amplifier. This parameter change enables faster sensing operation despite the reduced amplifier size.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If n-channel and p-channel compensation are used, then threshold voltage compensation is improved, but device complexity increases

Engineering Contradiction:
Improvethreshold voltage compensationVSAvoidcompensation circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts and eliminates the p-channel compensation circuitry from the sense amplifier design, relying solely on n-channel devices with negative source voltage biasing to achieve threshold voltage compensation. This simplification reduces device complexity while maintaining compensation effectiveness through the modified voltage operating point.

Inventive Principle:
Principle #2Taking out (Extraction)

4Ease of manufacture

If conventional sense amplifiers are used with shrinking memory cells, then manufacturing scalability is improved, but sensitivity to timing variations increases and read window decreases

Engineering Contradiction:
Improvemanufacturing scalabilityVSAvoidtiming sensitivity
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The negative source voltage biasing changes the operating parameters of the sense amplifier to provide enhanced drive strength and faster switching characteristics. This parameter modification increases the read window and reduces sensitivity to timing variations, allowing the amplifier to maintain robust performance as memory cells shrink and manufacturing variability increases.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20240203482A1Negative Pull-Down Voltage in a Sense Amplifier
Publication Date: 2024.06.20 MICRON TECHNOLOGY INC
  • US20240203482A1 patent drawing
  • US20240203482A1 patent drawing
  • US20240203482A1 patent drawing

AI summary

A memory device may include multiple memory cells configured to store data. The memory device may also include multiple digit lines that carry data to and from a respective memory cell. The memory device may include multiple sense amplifiers each selectively coupled to respective digit lines and including first and second transistors and first and second gut nodes coupled to the first and second transistors, respectively. Each sense amplifier may amplify a differential voltage between the first and second gut nodes by charging the first gut node and discharging the second gut node based on respective charges the digit lines, where a gain of the amplification is based on a negative voltage supplied to the sense amplifier and/or negative digit line write back operations.