Sense Amplification Circuit Offset Noise Cancellation
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Solution Overview
Problem
In dynamic random access memory (DRAM), offset noise caused by differences in device characteristics affects readout accuracy and performance due to voltage fluctuations between bit lines and complementary bit lines, which current methods struggle to stabilize effectively.
Innovation Solution
A sense amplification circuit with specific transistor configurations and control signals is used to stabilize the voltage of bit lines and complementary bit lines, including PMOS and NMOS transistors, to cancel offset noise while maintaining readout accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If the bit line is electrically connected to a complementary readout bit line and the complementary bit line is electrically connected to a readout bit line to cancel offset noise, then offset noise is reduced, but voltage fluctuations of the readout bit line and complementary readout bit line occur, reducing readout accuracy
Solution Approach 1:
The patent divides the sense amplification function into two independent paths: one path handles offset cancellation by connecting the bit line to the complementary readout bit line, while the other path maintains stable voltage for accurate readout. This segmentation allows offset noise cancellation without compromising readout accuracy, as each path performs its specific function independently.
Solution Approach 2:
The patent introduces an intermediary mechanism (the specific transistor configuration with controlled connections) that mediates between the offset cancellation requirement and the voltage stability requirement. The intermediary structure allows the system to achieve both offset noise reduction and voltage stability simultaneously, resolving the contradiction between these two requirements.
2Object-affected harmful factors
If different device characteristics are used to eliminate offset noise through voltage difference, then offset noise is canceled, but voltage stability of bit lines deteriorates
Solution Approach 1:
The patent employs dynamic control of transistor connections to achieve both offset cancellation and voltage stability. By dynamically adjusting which transistors are active and which connections are established based on the operational phase, the system can cancel offset noise during specific phases while maintaining voltage stability during readout phases, resolving the static contradiction between these two requirements.
Solution Approach 2:
The patent uses periodic action through sequential operational phases: first establishing connections for offset cancellation, then switching to connections for stable voltage maintenance. This periodic switching between different connection configurations allows the system to achieve both offset noise cancellation and voltage stability at different times in the operational cycle, resolving the contradiction.
Data Source
AI summary
The present disclosure provides a sense amplification circuit and a method of reading out data, including: a first PMOS transistor; a first NMOS transistor; a second PMOS transistor; a second NMOS transistor; a first control MOS transistor configured to provide a bias voltage to the first PMOS transistor according to a control signal; a second control MOS transistor configured to provide the bias voltage to the second PMOS transistor according to the control signal; a first offset cancellation MOS transistor configured to electrically connect an initial bit line to a first complementary readout bit line according to an offset cancellation signal; and a second offset cancellation MOS transistor configured to electrically connect an initial complementary bit line to a first readout bit line according to the offset cancellation signal.