Sense Amplifier Circuit Offset Voltage Compensation

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Solution Overview

Problem

The sense amplifier circuit in memory circuits suffers from slow read speed and large offset voltage due to device mismatch, which affects the bit-line read developing time and read latency.

Innovation Solution

The implementation of an offset-tolerant and latch-type sense amplifier circuit, which includes a differential amplifier, pre-charge switches, and a matching capacitor to maintain a fixed voltage difference during the sensing period, thereby reducing device mismatch effects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional sense amplifier circuit is used, then device mismatch causes large offset voltage, but this results in slow read speed and increased read latency

Engineering Contradiction:
Improveoffset voltageVSAvoidread speed
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent applies preliminary action by pre-charging the bit-line to a predetermined voltage level before the sensing operation. This pre-charging step establishes a known initial state that compensates for device mismatch effects, allowing the sense amplifier to accurately detect voltage differences without being affected by offset voltage, thereby improving both measurement precision and read speed

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the voltage parameter of the bit-line by pre-charging it to a specific predetermined voltage level before sensing. This parameter change creates a controlled initial condition that eliminates the impact of device mismatch and offset voltage, enabling faster and more accurate reading operations

Inventive Principle:
Principle #35Parameter changes

2Reliability

If device mismatch is present in the sense amplifier circuit, then offset voltage increases, but this leads to slower sensing speed and higher read latency

Engineering Contradiction:
Improvesensing accuracyVSAvoidread latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent performs preliminary pre-charging of the bit-line before sensing operations. This preliminary action establishes a controlled initial voltage state that compensates for device mismatch, ensuring accurate sensing while reducing the time required to achieve reliable detection, thereby decreasing read latency

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback mechanisms through the sense amplifier circuit that continuously monitors and adjusts the sensing process. The circuit uses feedback to compensate for device mismatch effects and maintain accurate voltage difference detection, improving both reliability and reducing the time needed for accurate reading

Inventive Principle:
Principle #23Feedback

3Measurement precision

If the bit-line read developing time is extended to improve sensing accuracy, then read latency increases

Engineering Contradiction:
Improvevoltage difference detectionVSAvoidread latency
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent applies preliminary pre-charging of the bit-line to a predetermined voltage level before sensing. This preliminary action creates an optimal initial state that enables accurate voltage difference detection to occur more quickly, reducing the developing time required while maintaining high measurement precision and thereby decreasing read latency

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20250166699A1Sense amplifier circuit, memory circuit, and sensing method thereof
Publication Date: 2025.05.22 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250166699A1 patent drawing
  • US20250166699A1 patent drawing
  • US20250166699A1 patent drawing

AI summary

A sensing method of a sense amplifier circuit is provided. The sense amplifier circuit comprises a differential amplifier. The differential amplifier comprises a first input node, a second input node, a first output node and a second output node. The sensing method comprising: providing a first switch and a second switch, wherein the first switch is coupled to the first input node and the first output node; pre-charging the first input node using a first output voltage of the first output node in response to a select signal by the first switch; and pre-charging the second input node using a second output voltage of the second output node in response to a select signal by the second switch.