Sense Amplifier Power Control for DRAM Write Speed

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Solution Overview

Problem

Semiconductor devices, such as DRAM, face challenges in increasing writing speed due to the continuous amplification of voltage differences by sense amplifiers during write operations, which maintains high driving intensity and can lead to inefficiencies.

Innovation Solution

A semiconductor device design that includes a first and second sense amplifier, power supply circuits, and a switching circuit, where the switching circuit selectively connects the power supply circuits during a data flip period, reducing the driving intensity of the sense amplifier by maintaining a voltage difference of a threshold voltage between the two sense amplifiers, thereby reducing the driving intensity and enhancing write speed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the sense amplifier continuously amplifies the voltage difference between bit lines during write operation, then the voltage difference is maintained, but the writing speed is reduced due to high driving intensity

Engineering Contradiction:
Improvevoltage difference maintenanceVSAvoidwriting speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The sense amplifier's power supply is controlled to be periodically connected and disconnected during the write operation. The power supply circuit receives a control signal that activates it only during specific periods (when data needs to be written), and deactivates it during other periods (data flip period). This periodic activation allows the sense amplifier to maintain voltage difference only when necessary, improving write speed while preserving reliability when needed.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The invention makes the sense amplifier's driving intensity dynamic by introducing a controllable power supply circuit that can adjust its activation state based on operational requirements. The power supply circuit is selectively connected to the sense amplifier through control signals, allowing the system to transition between high driving intensity (when writing data) and low driving intensity (during data flip), thus resolving the contradiction between maintaining voltage difference and achieving high write speed.

Inventive Principle:
Principle #15Dynamics

2Reliability

If the sense amplifier maintains high driving intensity, then voltage difference is maintained, but short currents occur and performance deteriorates

Engineering Contradiction:
Improvevoltage difference maintenanceVSAvoidshort current
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The power supply circuit is activated periodically only when data writing is required, and deactivated during the data flip period. This periodic control prevents the sense amplifier from continuously operating at high driving intensity, thereby eliminating the condition that causes short currents while still maintaining voltage difference when needed for reliable data writing.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The invention extracts the power supply control function from the continuous operation of the sense amplifier. By introducing a separate power supply circuit that can be independently controlled, the system separates the voltage difference maintenance function from continuous high-intensity operation, allowing the sense amplifier to operate only when necessary and preventing harmful short currents during periods when it is not needed.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS8797817B2Semiconductor devices, operating methods thereof, and memory systems including the same
Publication Date: 2014.08.05 SAMSUNG ELECTRONICS CO LTD
  • US8797817B2 patent drawing
  • US8797817B2 patent drawing
  • US8797817B2 patent drawing

AI summary

At least one example embodiment discloses a semiconductor device. The semiconductor device includes a first sense amplifier selectively connected between a first bit line and a second bit line, a second sense amplifier selectively connected between the first bit line and the second bit line, a first power supply circuit configured to provide a power supply voltage to the first sense amplifier in response to a first control signal, a second power supply circuit configured to provide a ground voltage to the second sense amplifier in response to a second control signal, and a switching circuit configured to selectively connect the first power supply circuit with the second power supply circuit in response to a third control signal.