Sense Amplifier Fast Bitline Precharge via Cascode Biasing
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Solution Overview
Problem
Conventional sense amplifiers face challenges in achieving fast precharge times for bitlines in memory arrays while maintaining low power consumption, as existing biasing units either consume high current for rapid precharge or have slower rising slopes due to low current consumption.
Innovation Solution
The proposed sense amplifier employs a biasing unit with a cascode transistor, capacitors, and a switch or resistor to isolate and then link the gate terminal to a voltage generator, allowing for rapid bitline precharge with low current consumption through capacitive coupling, similar to closed loop biasing while maintaining efficiency like open loop biasing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a closed loop biasing unit is used to achieve fast bitline precharge, then the precharge speed is improved, but the static current consumption increases significantly
Solution Approach 1:
The patent applies periodic action by using a two-phase precharge mechanism: a first precharge phase with the cascode transistor conducting to rapidly charge the bitline, followed by a second precharge phase where the cascode transistor is turned off and capacitors maintain the voltage. This periodic switching allows fast precharge when needed while minimizing current consumption during the maintenance phase.
Solution Approach 2:
The patent uses preliminary action by pre-charging capacitors (C1, C2, C3) during the first precharge phase before the sensing operation. These capacitors store energy that is then used to maintain the bitline voltage during the second phase, eliminating the need for continuous current flow and thus reducing static current consumption while maintaining fast response capability.
2Use of energy by moving object
If an open loop biasing unit is used to reduce current consumption, then the energy efficiency is improved, but the bitline precharge speed decreases
Solution Approach 1:
The patent applies periodic action by using a two-phase precharge mechanism: a first precharge phase with the cascode transistor conducting to rapidly charge the bitline, followed by a second precharge phase where the cascode transistor is turned off and capacitors maintain the voltage. This periodic switching allows fast precharge when needed while minimizing current consumption during the maintenance phase.
Solution Approach 2:
The patent replaces the continuous current-based voltage maintenance mechanism (open loop biasing) with a capacitive energy storage mechanism. The capacitors C1, C2, and C3 substitute for the continuous current flow, storing electrical energy during the first phase and releasing it during the second phase, thereby maintaining voltage without continuous current consumption while preserving fast response.
3Stability of the object's composition
If the cascode transistor is kept conducting to maintain bitline voltage, then the voltage stability is improved, but the current consumption increases
Solution Approach 1:
The patent uses preliminary action by pre-charging capacitors (C1, C2, C3) during the first precharge phase before the sensing operation. These capacitors store energy that is then used to maintain the bitline voltage during the second phase, eliminating the need for continuous current flow and thus reducing static current consumption while maintaining voltage stability.
Solution Approach 2:
The patent replaces the continuous current-based voltage maintenance mechanism with a capacitive energy storage mechanism. The capacitors C1, C2, and C3 substitute for the continuous current flow, storing electrical energy during the first phase and releasing it during the second phase, thereby maintaining voltage without continuous current consumption.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables fast bitline precharge with low current consumption, similar to closed loop biasing, while minimizing static current consumption like open loop biasing, effectively balancing speed and efficiency.
Implementation Method 1
The means for biasing the cascode transistor comprise: at least one gate-ground capacitor, one gate-source capacitor and one gate-drain capacitor for the cascode transistor
Implementation Method 2
isolating the gate terminal of the cascode transistor from the output of the voltage generator, so as to boost the bitline voltage
Data Source
AI summary
The disclosure relates to a sense amplifier comprising a cascode transistor and means for biasing the cascode transistor, supplying a control voltage to a gate terminal of the cascode transistor. The means for biasing the cascode transistor comprise means for isolating the gate terminal of the cascode transistor from the output of the voltage generator during a first period of the precharge phase, so as to boost the bitline voltage, then for linking the gate terminal to the output of the voltage generator during a second period of the precharge phase. Application in particular to sense amplifiers for non-volatile memories.