Sense Amplifier Precharge and Isolation for Low Voltage Sensing
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Solution Overview
Problem
Conventional sense amplifiers in semiconductor memory devices face challenges in quickly and reliably sensing data at reduced supply voltages, leading to longer sensing operations and increased susceptibility to electrical noise.
Innovation Solution
The implementation of a sense amplifier circuit with an N-latch driver circuit and an isolation switch driver circuit, which provide a negative voltage to NMOS transistors and control the coupling of digit lines to sense nodes at a controlled rate, enhancing the switching speed and reducing noise interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the supply voltage VCC is decreased to lower power consumption, then power consumption is reduced, but the sense amplifier circuit cannot drive the digit lines to the desired voltages due to transistor threshold voltage limitations
Solution Approach 1:
The digit lines are precharged to VCC/2 before the sensing operation begins. This preliminary action sets the initial voltage state so that when the sense amplifier activates, the NMOS transistors can effectively switch the digit lines between logic states even at reduced supply voltages, overcoming the threshold voltage limitation
2Loss of energy
If the supply voltage VCC is decreased to lower power consumption, then power consumption is reduced, but the sensing operation takes longer due to slower transistor switching
Solution Approach 1:
The digit lines are precharged to VCC/2 before sensing, which reduces the voltage swing required during the sensing operation. This preliminary preparation enables faster transistor switching and shorter sensing time even when operating at reduced supply voltages
Solution Approach 2:
The invention changes the operating parameters by using precharged digit lines at VCC/2 and employing specific transistor sizing ratios (PMOS width 2-10 times NMOS width). These parameter adjustments optimize the sensing speed and allow the sense amplifier to operate effectively at lower supply voltages with reduced sensing time
3Loss of energy
If the supply voltage VCC is decreased to lower power consumption, then power consumption is reduced, but the sense amplifier circuit becomes more susceptible to electrical noise
Solution Approach 1:
The digit lines are precharged to a stable VCC/2 voltage level before sensing begins. This preliminary action establishes a stable baseline that improves the signal-to-noise ratio during sensing, making the sense amplifier less susceptible to electrical noise even at reduced supply voltages
Solution Approach 2:
The invention optimizes transistor sizing parameters, specifically making PMOS transistors 2-10 times wider than NMOS transistors. This parameter change increases the drive strength and noise immunity of the sense amplifier circuit, allowing it to reject electrical noise effectively while operating at lower supply voltages
Data Source
AI summary
Systems and methods of sensing a data state coupled to a digit line and for coupling a digit line to a sense amplifier. In sensing the data state coupled to the digit line, the digit line is coupled to a sense node and driving voltages provided to the sense amplifier. The data state is latched in response to the driving voltages. In coupling the digit line to a sense amplifier, the digit line is coupled to the sense amplifier for a first time period and decoupled from the sense amplifier for a second time period. The digit line is coupled to the sense amplifier at a controlled rate following the second time period.