Sense-Amplifier Circuit Calibrating Sensing Range
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Solution Overview
Problem
Existing sense-amplifier circuits in memory devices face challenges in maintaining efficient sensing ranges due to lower operating voltages and transistor mismatches, leading to increased power consumption and sensitivity to noise signals, particularly with conventional compensation circuits being costly or prone to misreading.
Innovation Solution
A sense-amplifier circuit utilizing parallel-coupled n-type metal oxide semiconductor (NMOS) transistor switches on both sides of a sense-amplifier unit, with a control unit that selectively turns on or off these switches to calibrate the sensing range through feedback control, ensuring accurate voltage levels at connection terminals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by stationary object
If the operating voltage is reduced to lower power consumption, then power consumption decreases, but the bit lines have weaker input signals reducing sensing range
Solution Approach 1:
The patent introduces dynamically controllable switches that can adjust the circuit configuration based on operating conditions. The switches are controlled by calibration signals to optimize the sensing range at different voltage levels, making the sense-amplifier circuit adaptable to varying power consumption requirements while maintaining reliable sensing performance.
Solution Approach 2:
The patent changes the electrical parameters of the sense-amplifier circuit by introducing controllable switches that can alter the circuit's effective resistance and gain characteristics. By adjusting the switch states based on calibration data, the circuit parameters are optimized to maintain adequate sensing range even when operating voltage is reduced for lower power consumption.
2Area of stationary object
If transistor switches in the sense-amplifier circuit are used, then circuit area is reduced, but transistor mismatch occurs requiring compensation circuits
Solution Approach 1:
The patent implements a feedback mechanism where calibration signals are applied to the sense-amplifier circuit, and the resulting output is used to determine appropriate control signals for the controllable switches. This feedback loop compensates for transistor mismatch effects by dynamically adjusting the circuit configuration based on actual performance characteristics, eliminating the need for complex dedicated compensation circuits.
Solution Approach 2:
The sense-amplifier circuit performs self-calibration by using its own output signals to control the state of its internal switches. The circuit automatically adjusts its configuration to compensate for manufacturing variations in transistor characteristics, making the compensation process intrinsic to the circuit operation rather than requiring external complex compensation mechanisms.
3Manufacturing precision
If digital-to-analog converters are used for compensation circuits, then transistor mismatch is compensated, but circuit complexity and cost increase
Solution Approach 1:
Instead of using complex digital-to-analog converters, the patent achieves mismatch compensation by changing the effective circuit parameters through switch configuration. By controlling which switches are on or off, the circuit's electrical characteristics are adjusted to compensate for transistor variations, providing a simpler and more cost-effective solution than traditional DAC-based compensation.
4Manufacturing precision
If capacitors and switches are used for compensation circuits, then transistor mismatch is compensated, but the circuit becomes sensitive to noise signals causing misreading
Solution Approach 1:
The patent extracts and eliminates the problematic capacitive elements from the compensation circuit while retaining the essential switching functionality. By using only switches controlled by calibration-based logic to compensate for mismatch, the circuit avoids the noise sensitivity and misreading issues associated with capacitive compensation methods.
Data Source
AI summary
A sense-amplifier circuit of a memory, which includes a sense-amplifier unit, a first switch unit and a second switch unit. The sense-amplifier unit is constituted by a plurality of transistor switches and having a first, a second, a third and a fourth connection terminal. The first switch unit is configured to be parallel coupled between the first and second connection terminals of the sense-amplifier unit. The second switch unit is configured to be parallel coupled between the third and fourth connection terminals of the sense-amplifier unit. The first and second switch units each are constituted by a plurality of transistor switches coupled in parallel and are configured to control each of the parallel-coupled transistor switches on or off in the first and second switch units so as to calibrate a sensing range of the sense-amplifier unit. A calibrating method for a sense-amplifier circuit of a memory is also provided.