Sense Amplifier Circuit Disconnecting Bit Lines to Prevent Read Disturb
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Solution Overview
Problem
Emerging memory devices such as MRAM and ReRAM face read disturbance issues during high read current operations, leading to potential over-writing of data in memory cells, which existing solutions often address through complex signal control circuits that compromise performance.
Innovation Solution
A sense amplifier circuit employing a self-timed feedback control scheme that disconnects bit lines from the sense amplifier during read operations once the output signal is sensed, preventing high voltage and current from affecting unselected memory cells and maintaining performance without intricate control circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If high read current is used during read operation, then read performance is improved, but read disturbance occurs causing memory cells to be over-written
Solution Approach 1:
The patent applies preliminary action by pre-charging bit lines to a specific voltage level before the read operation begins. This preliminary preparation ensures that when high read current flows during the read operation, the bit lines are already in the correct state to prevent over-writing memory cells, thus avoiding read disturbance while maintaining high read performance
Solution Approach 2:
The patent implements feedback control by monitoring the state of memory cells during the read operation and adjusting the read current or bit line voltage in real-time. This feedback mechanism ensures that the read current remains high enough for good performance but does not exceed the threshold that would cause read disturbance and over-write memory cells
2Object-affected harmful factors
If precise signal control circuits are added to control read current and voltage, then read disturbance is prevented, but device complexity and signal delay increase
Solution Approach 1:
The patent applies self-service by designing the sense amplifier and bit line circuitry to automatically regulate the read current and voltage levels without requiring external control circuits. The sense amplifier inherently limits the current through its differential operation and transistor characteristics, providing self-protection against read disturbance while maintaining simple circuit architecture
Solution Approach 2:
The patent changes the operating parameters of the sense amplifier and bit lines dynamically during the read operation. By adjusting the voltage levels and current thresholds through transistor gating and timing control rather than complex control circuits, the system prevents read disturbance while keeping the overall device complexity low
Data Source
AI summary
A sense amplifier circuit implements a sense scheme using sense amplifier feedback control to disconnect the bit lines from the sense circuit during the read operation after the bit line signals are sensed. In this manner, read disturbance during the read operation is prevented. In some embodiments, the sense amplifier circuit includes a pair of pass gates to couple a pair of differential bit lines to a sense circuit. The sense amplifier circuit further includes a feedback control circuit to open the pair of pass gates in response to at least one of the sensed signals at the sense circuit changing logical state. The pair of pass gates are opened to disconnect the pair of differential bit lines from the sense circuit.