Sense Amplifier Reusing Transistors for Reference and Memory Cells

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Sense amplifiers in resistive nonvolatile memory (NVM) arrays face inaccuracies due to transistor mismatches, leading to increased size, cost, power consumption, and decreased operating speed, as larger components are required to mitigate these mismatches.

Innovation Solution

The implementation of a sense amplifier with a global bias circuit and a complementary transistor pair that uses the same circuit elements to evaluate both reference and memory cell resistances, eliminating mismatches by reusing the same path for bias setting and data read operations, and allowing for smaller, lower-power components that operate at higher speeds.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If larger components are used to reduce transistor mismatch, then measurement precision is improved, but device complexity and power consumption increase

Engineering Contradiction:
Improvesensing accuracyVSAvoidcomponent size
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent merges the reference path and data path into a single unified circuit path. The sense amplifier uses the same transistors and circuit elements for both evaluating the reference device and the memory cells, eliminating the need for separate matched transistor pairs in parallel paths. This integration reduces component count and complexity while maintaining measurement precision through sequential operation of the unified path.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The sense amplifier circuit elements are designed to perform multiple functions: first evaluating the reference device to determine a reference value, then evaluating memory cells to determine cell values. The same transistors and circuit components are reused across different evaluation phases, reducing overall device complexity and power consumption while maintaining accurate measurements through multi-phase operation.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Measurement precision

If larger components are used to reduce transistor mismatch, then measurement precision is improved, but power consumption increases

Engineering Contradiction:
Improvesensing accuracyVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent merges the reference path and data path into a single unified circuit path. The sense amplifier uses the same transistors and circuit elements for both evaluating the reference device and the memory cells, eliminating the need for separate matched transistor pairs in parallel paths. This integration reduces component count and complexity while maintaining measurement precision through sequential operation of the unified path.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The sense amplifier circuit elements are designed to perform multiple functions: first evaluating the reference device to determine a reference value, then evaluating memory cells to determine cell values. The same transistors and circuit components are reused across different evaluation phases, reducing overall device complexity and power consumption while maintaining accurate measurements through multi-phase operation.

Inventive Principle:
Principle #34Discarding and recovering

3Measurement precision

If larger components are used to reduce transistor mismatch, then measurement precision is improved, but operating speed decreases

Engineering Contradiction:
Improvesensing accuracyVSAvoidoperating speed
Core Design Contradiction:
Measurement precisionVSSpeed

Solution Approach 1:

The patent merges the reference path and data path into a single unified circuit path. The sense amplifier uses the same transistors and circuit elements for both evaluating the reference device and the memory cells, eliminating the need for separate matched transistor pairs in parallel paths. This integration reduces component count and complexity while maintaining measurement precision through sequential operation of the unified path.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The sense amplifier operates in periodic phases: first phase evaluates the reference device, second phase evaluates memory cells. This time-division multiplexing approach allows smaller, faster components to be used since each component operates at full speed during its designated phase, rather than requiring oversized components that can handle simultaneous operations with reduced speed.

Inventive Principle:
Principle #19Periodic action

4Measurement precision

If separate paths are used for reference and data evaluation, then measurement precision is improved, but device complexity increases

Engineering Contradiction:
Improvesensing accuracyVSAvoidcircuit structure
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent merges the reference path and data path into a single unified circuit path. The sense amplifier uses the same transistors and circuit elements for both evaluating the reference device and the memory cells, eliminating the need for separate matched transistor pairs in parallel paths. This integration reduces component count and complexity while maintaining measurement precision through sequential operation of the unified path.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10741255B1Sense amplifier reusing same elements for evaluating reference device and memory cells
Publication Date: 2020.08.11 GLOBALFOUNDRIES US INC
  • US10741255B1 patent drawing
  • US10741255B1 patent drawing
  • US10741255B1 patent drawing

AI summary

A sense amplifier includes, among other components, a first capacitor adapted to be charged to a precharge voltage, a complementary transistor pair (adapted to connect to the first capacitor, to a reference resistance device, and to a memory cell), a comparator adapted to connect to the complementary transistor pair, and a second capacitor adapted to connect to the comparator. The complementary transistor pair is adapted to produce a first bit voltage based on the precharge voltage and the reference resistance of the reference resistance device. The comparator is adapted to charge the second capacitor to a comparison voltage based on the first bit voltage. The complementary transistor pair is adapted to produce a cell bit voltage based on the precharge voltage and the resistance of the memory cell. The comparator is adapted to compare the cell bit voltage to the comparison voltage to produce an amplified memory cell value.