Semiconductor Memory Sense Amplifier Mode Switching
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Solution Overview
Problem
Semiconductor memory devices face challenges with data bus sense amplifiers that either consume high current with insufficient full swing in semi-latch type or are susceptible to noise and produce erroneous data in full-latch type, failing to provide a stable and noise-resistant amplification.
Innovation Solution
A semiconductor memory device with a data bus sense amplifier that operates in semi-latch type for a predetermined period to detect and amplify correct data, then switches to full-latch type to reduce current dissipation and enhance noise immunity by ensuring full swing operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the data bus sense amplifier operates in semi-latch type mode, then noise immunity is improved and correct data can be detected even with signal fluctuations, but current consumption increases and output signal swing is insufficient
Solution Approach 1:
The patent applies the dynamics principle by making the data bus sense amplifier's operational mode changeable over time. The amplifier transitions from semi-latch type mode during a first period (prior to full swing operation) to full-latch type mode during a second period (after full swing operation). This temporal dynamic adjustment allows the system to optimize between noise immunity and current consumption based on the operational phase, resolving the contradiction between these two parameters.
2Use of energy by moving object
If the data bus sense amplifier operates in full-latch type mode, then current consumption is reduced and full swing operation is achieved, but noise immunity deteriorates and erroneous data may be output
Solution Approach 1:
The patent applies the preliminary action principle by operating the data bus sense amplifier in semi-latch type mode during a first period before full swing operation occurs. This preliminary phase allows the amplifier to establish stable signal levels and reject noise before transitioning to full-latch type mode, preventing erroneous data detection while still enabling low current consumption during the subsequent full swing phase.
3Measurement precision
If the data bus sense amplifier operates in semi-latch type mode, then correct data detection is maintained despite signal fluctuations, but output signal swing range is insufficient
Solution Approach 1:
The patent applies the periodic action principle by dividing the operational timeline into distinct periods: a first period where the amplifier operates in semi-latch type mode to ensure accurate data detection, followed by a second period where it operates in full-latch type mode to achieve full signal swing. This periodic switching between operational modes resolves the contradiction between detection accuracy and signal swing range by applying the appropriate mode at the appropriate time.
Data Source
AI summary
A semiconductor memory device includes a memory cell array having memory cells arranged in rows and columns, a row decoder selecting one of the rows and activating the selected row, a bit-line sense amplifier detecting and amplifying data of the memory cells coupled to the selected row through the columns, a data-bus sense amplifier detecting and amplifying data output from the bit-line sense amplifier, and a control logic block enabling the bit-line and data-bus sense amplifiers in a reading operation, operating the data-bus sense amplifier in a semi-latch type mode for a predetermined period, and operating the data-bus sense amplifier in a full-latch type mode after the predetermined period.