Sense Amplifier Single Phase Signal Design
Solution Overview
Problem
Non-volatile memory devices face performance and cost issues due to the high number of phase signals required for sense amplifiers, which complicates design and increases error likelihood, especially at low supply voltages with noise fluctuations.
Innovation Solution
A sense amplifier design that uses a single phase signal, incorporating an amplification stage, buffer stage, and latching stage to stabilize voltages and currents, reducing the complexity of the signals generation block and enhancing reliability at low supply voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple phase signals are used to control the sense amplifier, then the reading operation can be performed with proper timing control, but the design complexity and area occupation of the signals generation block increases
Solution Approach 1:
The patent merges multiple phase signals into a single phase signal that controls the sense amplifier. The sense amplifier is designed with internal timing control that automatically generates the necessary timing phases during the reading operation, eliminating the need for external multi-phase signal generation blocks and reducing design complexity while maintaining reliable operation
Solution Approach 2:
The single phase signal serves multiple functions within the sense amplifier, triggering sequential internal stages that perform pre-charge, equalization, and latching operations. This multi-functional approach replaces the need for separate dedicated phase signals for each operation phase
2Manufacturing precision
If multiple phase signals are used to control the sense amplifier, then the reading operation timing can be precisely controlled, but the configuration and test time increases
Solution Approach 1:
By combining multiple phase signals into one, the patent reduces the number of timing parameters that need to be configured and tested. The internal timing generation within the sense amplifier eliminates the need for external configuration of multiple phase signal timings, significantly reducing both configuration time and test time while maintaining precise timing control
3Area of stationary object
If the sense amplifier operates at low supply voltage to reduce area occupation, then the area is reduced, but the amplifier becomes sensitive to voltage fluctuations and noise
Solution Approach 1:
The patent employs dynamic voltage boosting within the sense amplifier that activates only during the reading operation. The voltage booster temporarily increases the supply voltage to optimal levels during critical comparison phases, ensuring stable operation and noise immunity, while the amplifier maintains low area occupation by using standard low-voltage transistors that are activated dynamically rather than continuously
Data Source
AI summary
A non-volatile memory device includes a sense amplifier for comparing a conduction current of a selected one of a plurality of memory cells with a reference current. The sense amplifier includes an amplification stage having a first input terminal for receiving a first comparison voltage, a second input terminal for receiving a reference value, and an output terminal for providing a second comparison voltage. A buffer stage has an output terminal for providing a comparison current according to a difference between the conduction current and the reference current, and an input terminal for stabilizing the first comparison voltage at the reference value and the second comparison voltage at a comparison value unbalanced with respect to the reference value according to the comparison current. A latching stage indicates a logic level stored in the memory cell according to a difference between the comparison value and the reference value.