Two-Stage Sense Amplifier for Low-Voltage Non-Volatile Memory
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Solution Overview
Problem
Existing eFuse type one-time programmable non-volatile memory devices face challenges in performing high-speed operations at low voltages due to the difficulty in amplifying small voltage differences and the issue of DC current affecting the sense amplifier's ability to reach full logic levels.
Innovation Solution
A non-volatile memory device with a sense amplifier featuring a two-stage sensing structure, where the input terminal and final output terminal are separated, allowing for primary and secondary amplification of voltage differences. This structure includes first and second stage sense amplifiers with positive feedback circuits driven by specific signals, enabling high-speed operations even at low voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a traditional single-stage sense amplifier is used, then the device complexity is low, but the operation speed is slow and full logic level amplification cannot be achieved at low voltages
Solution Approach 1:
The sense amplifier is divided into two distinct stages: a first stage sense amplifier for initial voltage difference sensing and primary amplification, and a second stage sense amplifier for secondary amplification to achieve full logic levels. This segmentation allows each stage to be optimized for its specific function, enabling high-speed operation at low voltages while achieving complete logic level restoration.
2Use of energy by moving object
If the sense amplifier operates at low voltage, then energy consumption is reduced, but the voltage difference to be sensed becomes very small requiring longer sensing time
Solution Approach 1:
Positive feedback circuits are implemented in both the first and second stage sense amplifiers. The first positive feedback circuit amplifies the initial small voltage difference generated at low voltage, and the second positive feedback circuit further amplifies this signal to full logic levels. This feedback mechanism accelerates the sensing process, reducing sensing time while maintaining low voltage operation and low energy consumption.
3Duration of action of stationary object
If DC current is present at input and output terminals, then the sense amplifier can operate continuously, but the ability to amplify voltage difference to full logic level is compromised
Solution Approach 1:
The sense amplifier is segmented into two stages with distinct functions. The first stage handles the initial voltage difference sensing with high precision, while the second stage performs the amplification to full logic levels. This segmentation isolates the precision-sensitive sensing operation from the logic-level amplification, allowing DC current to flow continuously without compromising the accuracy of voltage difference measurement while still achieving full logic level output.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution enables high-speed data reading and output even at low voltages, specifically allowing successful operation at voltages as low as 1.06 V under worst environmental conditions, compared to 1.30 V required by traditional sense amplifiers.
Implementation Method 1
The first positive feedback circuit may be connected to a first input terminal SA, to which the voltage of the bit line is applied, and to a second input terminal SAB, to which the reference voltage is applied, sense the voltage difference between the reference voltage and the voltage of the bit line, perform the primary amplification of the sensed voltage difference
Implementation Method 2
The second positive feedback circuit may be connected to both ends of the second PMOS transistor PM2_2 and both ends of the third PMOS transistor PM3_2, perform the secondary amplification, and then output the second result of the secondary amplification
Data Source
AI summary
Various embodiments of the present disclosure relate to a non-volatile memory device including a sense amplifier and an operation method thereof. The non-volatile memory device may include: a memory cell array comprising a plurality of memory cells; and the sense amplifier configured to read data of the plurality of memory cells and output the read data. The sense amplifier may include: a first stage sense amplifier configured to sense a voltage difference between a reference voltage and a voltage of a bit line connected to at least one memory cell among the plurality of memory cells, and perform a primary amplification of the sensed voltage difference; and a second stage sense amplifier configured to perform a secondary amplification of a first result of the primary amplification and output a second result of the secondary amplification.