Current Sense Amplifier Switching to Cut Read Voltage Drop
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Solution Overview
Problem
Current sense amplifiers for non-volatile memory, such as NAND flash memory, experience inefficiencies and high power losses due to voltage drops during data reading, particularly when using multiple bit line clamping biases and cascode paths.
Innovation Solution
Incorporating an auxiliary control switch to accurately control the holding path in the sense amplifier, reducing the number of bit line clamping biases and optimizing switch configurations to minimize voltage drops and power losses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If three bit line clamping biases and two cascode paths are used in the sense amplifier, then the voltage sensing capability is improved, but significant voltage drops occur leading to power loss and reduced efficiency
Solution Approach 1:
The patent segments the clamping function by introducing separate clamping circuits for different bit lines (first, second, and third bit lines) with independent clamping biases. This segmentation allows precise control of voltage levels on each bit line, improving sensing capability while reducing unnecessary voltage drops by applying clamping only where needed during specific operation phases.
Solution Approach 2:
The patent implements dynamic control of the holding path through a fourth switch that is selectively activated based on operation phase. During pre-charging phase, the holding path is enabled to maintain stable voltage levels; during sensing phase, it is disabled to allow accurate voltage detection. This dynamic switching optimizes both sensing precision and power efficiency by avoiding continuous voltage boosting.
2Reliability
If voltage boosting is applied to ensure devices operate in saturation region, then device operation reliability is improved, but extra power loss occurs due to raising the voltage
Solution Approach 1:
The patent applies periodic action by enabling voltage boosting only during specific operation phases (pre-charging and holding phases) through controlled switching of the holding path. During the sensing phase, the boosting is disabled to eliminate unnecessary power consumption. This periodic activation ensures device reliability when needed while minimizing power loss during critical sensing operations.
Solution Approach 2:
The patent dynamically changes voltage parameters by adjusting the holding path activation based on operation phase. The voltage at the sensing node is boosted to higher levels during pre-charging to ensure saturation region operation, then allowed to settle to appropriate sensing levels during the sensing phase. This parameter change strategy maintains reliability while reducing the duration and magnitude of voltage boosting, thereby reducing power loss.
3Productivity
If the holding path is continuously active to pre-charge bit lines, then pre-charging performance is improved, but power consumption increases during sensing operations
Solution Approach 1:
The patent implements dynamic control of the holding path through a fourth switch that transitions the path between active and inactive states based on operation phase. During pre-charging, the holding path is active to rapidly charge bit lines to required voltage levels. During sensing operations, the holding path is deactivated to eliminate its power consumption, allowing accurate voltage sensing without interference or unnecessary energy use. This dynamic switching optimizes both pre-charging performance and overall power efficiency.
Data Source
AI summary
The configurations of sense amplifier and methods thereof are provided. The proposed sense amplifier includes a switch circuit having a main control switch, a sensing switch and a holding switch, wherein the three switches have a first bias, a second bias and a third bias respectively, and an auxiliary control switch electrically connected to the holding switch to control an operation of the holding switch.