Sense Amplifier Voltage Dynamics for Leakage Reduction

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Solution Overview

Problem

High-density memory architectures with vertical access devices and floating body architectures face significant leakage current issues due to voltage differentials, which can increase access times beyond performance specifications, and reducing voltages to mitigate leakage current compromises access times further.

Innovation Solution

A sense amplifier circuit dynamically adjusts activation and reference voltages during memory access operations, initially using higher ACT and lower RNL voltages to reduce leakage current and then switching to lower ACT and higher RNL voltages after an initial time period to balance access speed and leakage reduction.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-generated harmful factors

If higher voltages are applied to reduce leakage current, then leakage current is reduced, but access time increases beyond performance specifications

Engineering Contradiction:
Improveleakage currentVSAvoidaccess time
Core Design Contradiction:
Object-generated harmful factorsVSSpeed

Solution Approach 1:

The patent applies dynamics by transitioning the sense amplifier from a static voltage state to a dynamic two-phase operation. Initially, the sense amplifier uses higher ACT and lower RNL voltages to reduce leakage current during the first portion of the access operation. Then, it switches to lower ACT and higher RNL voltages for the second portion to ensure fast transition rates meet performance specifications. This temporal dynamic adjustment resolves the contradiction between leakage reduction and speed requirements.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent implements periodic action by dividing the memory access operation into distinct time phases with different voltage configurations. The sense amplifier operates in a first phase with voltage settings optimized for leakage reduction, then transitions to a second phase with voltage settings optimized for fast transitions. This periodic switching of operational modes allows the system to achieve both leakage current reduction and performance specification compliance.

Inventive Principle:
Principle #19Periodic action

2Object-generated harmful factors

If voltages are reduced to mitigate leakage current, then leakage current decreases, but transition rates slow down

Engineering Contradiction:
Improveleakage currentVSAvoidtransition time
Core Design Contradiction:
Object-generated harmful factorsVSLoss of time

Solution Approach 1:

The sense amplifier dynamically adjusts its voltage configuration in two phases: first using higher ACT and lower RNL voltages to minimize leakage current, then switching to lower ACT and higher RNL voltages to accelerate transitions and meet timing specifications. This dynamic voltage switching resolves the trade-off between leakage reduction and transition speed.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent applies preliminary action by first applying voltage settings optimized for leakage reduction during the initial portion of the access operation, before transitioning to the second phase. This preliminary phase prepares the circuit state while minimizing leakage, and the subsequent phase ensures fast transitions occur within performance specifications.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9076501B2Apparatuses and methods for reducing current leakage in a memory
Publication Date: 2015.07.07 MICRON TECHNOLOGY INC
  • US9076501B2 patent drawing
  • US9076501B2 patent drawing
  • US9076501B2 patent drawing

AI summary

Apparatuses, sense amplifier circuits, and methods for operating a sense amplifier circuit in a memory are described. An example apparatus includes a sense amplifier circuit configured to be coupled to a digit line and configured to, during a memory access operation, drive the digit line to a voltage that indicates the logical value of the charge stored by a memory cell coupled to the digit line. During an initial time period of the memory access operation, the sense amplifier circuit is configured to drive the digit line to a first voltage that indicates the logical value of the charge stored by the memory cell. After the initial time period, the sense amplifier circuit is configured to drive the digit line to a second voltage different than the first voltage that indicates the logical value of the charge stored by the memory cell.