Non-volatile Memory Sense Module Initialization and Bit Line Voltage Hold

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Solution Overview

Problem

There is a need for faster programming and reduced power consumption in non-volatile semiconductor memory systems, particularly in flash memory technologies used in electronic devices, due to marketplace pressures for improved performance and efficiency.

Innovation Solution

The implementation of a non-volatile storage system that reduces power consumption by avoiding the cycle of lowering and raising bit line voltage for inhibited storage elements and initializes sense modules based on target data states to minimize data transfers and logical operations during programming operations, thereby reducing programming time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If traditional programming operations are used with full bit line voltage cycling for all storage elements, then programming completeness is ensured, but power consumption increases and programming time extends

Engineering Contradiction:
Improvepower consumptionVSAvoidprogramming speed
Core Design Contradiction:
Loss of energyVSProductivity

Solution Approach 1:

The patent applies preliminary action by initializing sense modules based on target data states before programming begins. Write data is loaded into data latches and sense modules are pre-configured with expected final states, allowing the system to skip unnecessary data transfers and logical operations during programming, thereby reducing both power consumption and programming time while ensuring complete programming of all required storage elements

Inventive Principle:
Principle #10Preliminary action

2Loss of energy

If bit line voltage is cycled for all storage elements including inhibited ones, then programming control is maintained, but power consumption increases

Engineering Contradiction:
Improvepower consumptionVSAvoidprogramming control
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The patent applies local quality by differentiating the treatment of storage elements based on their programming status. Inhibited storage elements (those already programmed or not requiring programming) have their bit lines floated or held at fixed potentials rather than cycled, while active storage elements undergo full voltage cycling. This localized differentiation reduces power consumption for inhibited elements while maintaining programming control for active elements through the inhibit mechanism that prevents charge injection into already-programmed elements

Inventive Principle:
Principle #3Local quality

3Manufacturing precision

If data transfers and logical operations are performed for every program-verify iteration, then programming accuracy is ensured, but programming time increases

Engineering Contradiction:
Improveprogramming accuracyVSAvoidprogramming time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent applies preliminary action by pre-loading write data into data latches and pre-initializing sense modules with target data states before the programming operation begins. This preliminary configuration allows the verify operation to directly compare actual storage element states against pre-established targets without requiring extensive data transfers or complex logical operations during each iteration, thereby maintaining programming accuracy while significantly reducing programming time

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS8107298B2Non-volatile memory with fast binary programming and reduced power consumption
Publication Date: 2012.01.31 SANDISK TECHNOLOGIES LLC
  • US8107298B2 patent drawing
  • US8107298B2 patent drawing
  • US8107298B2 patent drawing

AI summary

In a non-volatile storage system, the time needed to perform a programming operation is reduced by minimizing data transfers between sense modules and a managing circuit. A sense module is associated with each storage element. Based on write data, a data node in the sense module is initialized to “0” for a storage element which is to remain in an erased state, and to “1” for a storage element which is to be programmed to a programmed state, then flipped to “0” when programmed is completed. The managing circuit is relieved of the need to access the write data to determine whether a “0” represents a storage element for which programming is completed. Power consumption can also be reduced by keeping a bit line voltage high between a verify phase of one program-verify iteration and a program phase of a next program-verify iteration.