Power Transistor Sense Circuit With Pinch-Off Voltage Clamping
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Solution Overview
Problem
Conventional integrated circuits cannot safely sense the drain/collector voltage of high-voltage power transistors due to voltage exceeding their maximum input range, necessitating expensive workarounds like high-voltage decoupling diodes.
Innovation Solution
Integrate a depletion mode sense transistor with a voltage tap region in the same semiconductor substrate as the power transistor, clamping the sensed voltage below the maximum drain/collector voltage using a pinch-off point design.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional integrated circuits are used to sense drain/collector voltage, then standard IC technologies can be applied, but the sensing cannot be performed safely because the voltage exceeds the maximum input range
Solution Approach 1:
A depletion mode sense transistor is introduced as an intermediary component between the high-voltage drain/collector node and the sensing circuitry. This sense transistor follows the drift zone potential through its voltage tap region while its pinch-off point clamps the voltage to a safe level, thereby mediating between the harmful high voltage and the sensitive IC input without requiring external high-voltage protection components
Solution Approach 2:
The depletion mode sense transistor utilizes changes in channel conductivity parameters to achieve voltage following and clamping. By designing the pinch-off point at a specific location, the transistor dynamically adjusts its electrical parameters to maintain the sensed voltage within safe operating limits while accurately reflecting the drain/collector voltage profile
2Reliability
If high voltage decoupling diodes or high voltage devices are used in IC technologies, then safe voltage sensing can be achieved, but the cost increases significantly
Solution Approach 1:
The sense transistor is merged with the power transistor cell structure, sharing the same drift zone and substrate. This integration eliminates the need for separate external high-voltage protection components like decoupling diodes, as the sense transistor itself provides both the sensing function and the inherent voltage clamping through its depletion mode operation and pinch-off characteristics
Solution Approach 2:
The depletion mode sense transistor performs multiple functions: it acts as a voltage follower to sense the drain/collector voltage, provides inherent voltage clamping through its pinch-off point, and eliminates the need for external protection components. This multi-functionality integrates sensing and protection capabilities into a single device, reducing overall system cost
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables safe sensing of drain/collector voltage using standard IC technologies, improving driving schemes and protection for power switches.
Implementation Method 1
a normally conducting channel of the depletion mode sense transistor pinches off
Implementation Method 2
a voltage between the sense terminal and the reference terminal is clamped below a maximum drain/collector voltage
Data Source
AI summary
A power semiconductor device includes: a semiconductor substrate; a power transistor formed in a cell field of the semiconductor substrate; a reference terminal; a sense terminal; and a depletion mode sense transistor integrated in the semiconductor substrate and having a voltage tap region of a first conductivity type. The voltage tap region is electrically connected to the sense terminal and follows a drift zone potential of the power transistor until a normally conducting channel of the depletion mode sense transistor pinches off. A pinch-off point of the normally conducting channel of the depletion mode sense transistor is designed such that a voltage between the sense terminal and the reference terminal is clamped below a maximum drain/collector voltage of the power semiconductor device.