Sensing Element Placement Above Metallization Layers
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Solution Overview
Problem
Conventional sensor formation on semiconductor substrates results in signal degradation and cross-talk due to the presence of multiple metallization layers, which conflict with the requirements of application-specific integrated circuits (ASICs), leading to non-uniform photon deflection and distorted images.
Innovation Solution
The formation of sensing elements within passivation layers, with a minimal number of dielectric and metal layers, reduces photon reflection and deflection, improving signal strength and reducing cross-talk by minimizing the number of interfaces photons need to penetrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple metallization layers are formed to support ASIC requirements, then the ASIC can be integrated with the sensor, but signal strength degrades and cross-talk increases due to photon reflection and deflection at dielectric interfaces
Solution Approach 1:
Instead of forming sensors at the substrate surface and stacking metallization layers above them (conventional approach), the patent inverts the sequence by first forming the complete ASIC with all metallization layers, then integrating the sensor on top of the finished ASIC structure. This inversion allows photons to travel through minimal dielectric layers directly to the sensor, eliminating reflection and deflection issues while maintaining ASIC integration capability
Solution Approach 2:
The patent transitions from a vertical stacking approach (sensors below metallization layers) to a planar integration approach where the sensor is formed in the passivation layer above the complete ASIC metallization structure. This dimensional reorganization allows the sensor to be positioned in optimal location without being constrained by traditional vertical layering, reducing photon path interference
2Reliability
If inter-layer and inter-metal dielectric layers are thinned to reduce photon reflection, then signal strength improves, but process difficulty increases and ASIC performance may degrade
Solution Approach 1:
The patent extracts the sensor formation step from the traditional pre-metallization process and relocates it to occur after the complete ASIC metallization structure is formed. By taking the sensor formation out of the critical metallization stacking sequence and placing it in the final passivation layer, the method avoids the need to thin any dielectric layers while still achieving optimal photon detection
3Ease of manufacture
If standard metallization layers are used for ASIC, then manufacturing cost is reduced, but photon deflection becomes non-uniform causing image distortion
Solution Approach 1:
The patent converts the potentially harmful effect of multiple dielectric interfaces into a beneficial configuration by positioning the sensor above rather than below the metallization layers. The same standard metallization layers that cause reflection when sensors are below them become transparent pathways when sensors are above them, turning the manufacturing simplicity advantage into a quality-enhancing feature
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances signal strength, reduces cross-talk, and lowers manufacturing costs by allowing for improved sensor performance without the need for customized processes to thin inter-layer and inter-metal dielectric layers.
Implementation Method 1
photons (symbolized by arrows 10) have to penetrate the dielectric layers in metallization layers 6 and the passivation layer(s) 8. This causes the degradation in the signal strength received by photo diodes 4
Implementation Method 2
metallization layers 6 typically include low-k dielectric layers, and etch stop layers (ESLs) between the low-k dielectric layers. The ESL layers and low-k dielectric layers have different refractive indexes, resulting in the reflection and deflection of the photons
Implementation Method 3
The ESL layers and low-k dielectric layers have different refractive indexes, resulting in the reflection and deflection of the photons
Implementation Method 4
The ESL layers and low-k dielectric layers have different refractive indexes, resulting in the reflection and deflection of the photons
Data Source
AI summary
An integrated circuit structure includes a substrate and a metallization layer over the substrate. The metallization layer includes a dielectric layer and metal lines in the dielectric layer. The integrated circuit structure further includes a sensing element over the metallization layer. The sensing element may be formed in passivation layers.