Sensitivity Amplifier Offset Voltage Compensation
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Solution Overview
Problem
The random mismatch of threshold voltages between devices in sensitivity amplifiers leads to offset voltage, reducing sensitivity, resolution, and increasing reading errors, especially with longer bit lines and smaller storage capacitance.
Innovation Solution
A sensitivity amplifier with a pre-charge module and a control method that includes stages for pre-charging, offset-voltage compensation, small signal amplification, and write-back, utilizing PMOS and NMOS transistors and switch units to adjust connection modes and compensate for offset voltage differences.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If charge sharing is used to generate small signal differential input voltage, then the sensitivity amplifier can read data, but as bit lines become longer and storage capacitance becomes smaller, the parasitic capacitance increases causing the small signal differential input voltage to become smaller, which increases the impact of offset voltage and reduces sensitivity and resolution
Solution Approach 1:
The patent applies preliminary action by pre-charging the bit lines to a preset voltage before the actual reading operation. The pre-charge module charges both bit lines to the same voltage level in advance, establishing a common reference potential. This preliminary charging action reduces the impact of parasitic capacitance on the small signal differential input voltage, thereby maintaining sensitivity and resolution even when bit lines become longer and storage capacitance becomes smaller.
2Reliability
If devices are used in sensitivity amplifier, then the amplifier can function, but random mismatch between devices causes threshold voltage mismatch, leading to offset voltage generation that reduces sensitivity and increases reading errors
Solution Approach 1:
The patent applies equipotentiality by ensuring both bit lines are charged to the same preset voltage through the pre-charge module before differential reading. By establishing equal potential levels on both bit lines in advance, the circuit creates a symmetric starting condition that compensates for device mismatch effects. This equipotential state reduces the generation of offset voltage caused by random threshold voltage mismatches between devices.
3Quantity of substance
If bit lines are made longer to increase storage capacity, then more data can be stored, but parasitic capacitance on bit lines increases, causing small signal differential input voltage to decrease and offset voltage impact to increase
Solution Approach 1:
The patent applies preliminary action by pre-charging the bit lines to a preset voltage before the actual reading operation. This advance charging establishes a strong voltage baseline that compensates for the increased parasitic capacitance effect in longer bit lines. By performing this preliminary charging action, the system maintains adequate small signal differential input voltage levels even when bit line length increases to provide greater storage capacity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Significantly reduces offset voltage, thereby improving sensitivity and resolution of the sensitivity amplifier and reducing reading errors.
Implementation Method 1
a first end of the first energy storage unit is connected to the first input and output terminal, and a second end of the first energy storage unit is grounded via the seventh switch unit
Implementation Method 2
the small signal differential input voltage of the sensitivity amplifier is generated by charge sharing
Data Source
AI summary
The disclosure provides a sense amplifier and a control method thereof. The sense amplifier includes: a pre-charge module, a first input and output terminal, a second input and output terminal, a first PMOS transistor, a second PMOS transistor, a first NMOS transistor, and a second NMOS transistor, a first switch unit, a second switch unit, a third switch unit, a fourth switch unit, a fifth switch unit, a sixth switch unit, a seventh switch unit, an eighth switch unit, a first energy storage unit and a second energy storage unit. The sense amplifier can compensate for the offset voltage. The result is a sense amplifier with greatly reduced offset voltage, thereby improving the sensitivity and resolution of the sense amplifier.