Sensor Fabrication Using Multi-Layer Resist Merging

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Solution Overview

Problem

Conventional sensor fabrication methods are costly and complex, requiring multiple patterning processes and masks, which complicates production and limits capacity.

Innovation Solution

A method for fabricating sensors using a top gate TFT configuration with reduced mask usage, involving sequential single patterning processes to form key layers such as data lines, electrodes, active layers, and gate structures, simplifying the process and reducing production costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If multiple patterning processes are used to form multiple patterning layers of the sensor, then the sensor structure and function are achieved, but the fabrication cost increases and the process becomes complicated

Engineering Contradiction:
Improvesensor structure formationVSAvoidfabrication process
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent combines multiple patterning operations into a single patterning process by using a multi-layer resist structure. The first resist layer is used to form patterns for the first, third, and fifth patterning layers simultaneously, while the second resist layer forms patterns for the second and fourth patterning layers. This merging of operations reduces the total number of patterning steps from 5 to 2, thereby reducing fabrication cost and process complexity while maintaining the required sensor structure.

Inventive Principle:
Principle #5Merging (Combining)

2Manufacturing precision

If multiple patterning processes are used to form multiple patterning layers of the sensor, then the sensor structure and function are achieved, but the production capacity is difficult to increase

Engineering Contradiction:
Improvesensor structure formationVSAvoidproduction capacity
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent merges multiple patterning steps into fewer simultaneous operations using a multi-layer resist approach. By forming patterns for multiple layers in parallel within single patterning processes, the total fabrication time is reduced and production throughput is increased, thereby improving production capacity while maintaining manufacturing precision.

Inventive Principle:
Principle #5Merging (Combining)

3Manufacturing precision

If 9 to 11 masks are required for multiple patterning processes, then multiple patterning layers are formed, but the fabrication cost becomes high

Engineering Contradiction:
Improvemulti-layer patterningVSAvoidfabrication cost
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The patent reduces the number of masks from 9-11 to just 2 masks by combining multiple patterning functions into a single multi-layer resist process. The first mask is used to pattern the first, third, and fifth layers simultaneously, while the second mask patterns the second and fourth layers. This dramatic reduction in mask quantity directly lowers fabrication cost while maintaining the capability to form complex multi-layer sensor structures.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach decreases production costs, simplifies the fabrication process, and enhances the defect-free rate and production capacity of sensors.

Implementation Method 1

the photocurrent signal generated by the photodiode 13

Methodology Applied
Scientific EffectPhotoelectric effect: Photoelectric Effect

Data Source

PatentUS8962371B2Method for fabricating sensor
Publication Date: 2015.02.24 BEIJING BOE OPTOELECTRONCIS TECH CO LTD
  • US8962371B2 patent drawing
  • US8962371B2 patent drawing
  • US8962371B2 patent drawing

AI summary

A method for fabricating a sensor, comprises: forming, on a base substrate, a pattern of a data line (31), a pattern of a drain electrode (34), a pattern of a source electrode (33), a pattern of a receive electrode (39), a pattern of a photodiode (40) and a pattern of a transparent electrode (41); forming a pattern of an ohmic layer by using a first patterning process; forming a pattern of an active layer by using a second patterning process; forming a pattern of a gate insulating layer by using a third patterning process; and forming a pattern of a gate line (30), a pattern of a gate electrode (38) and a pattern of a bias electrode (42) by using a fourth patterning process. Such a method can reduce the number of mask as well as the production cost and simplifies the production process, thereby significantly improves the production capacity and the defect-free rate.