Sequential ADC Early-Stop Control for Lower Power Conversion
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Solution Overview
Problem
Sequential comparison analog-to-digital converters face challenges in reducing power consumption while maintaining a high sampling rate, as the time required for conversion increases with the number of bits, leading to higher power consumption.
Innovation Solution
Incorporating a stop control unit that halts the conversion process when the digital signal value is outside a predetermined range, along with a determination unit to assess the signal value and a reference signal control unit to update the reference signal, allowing for efficient bit generation and reduced power usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the number of bits in digital signal is increased, then the precision of conversion is improved, but the conversion time is extended and power consumption increases
Solution Approach 1:
The patent applies partial action by performing AD conversion only for signals within the interest range. The determination unit checks whether the analog signal value falls within a predetermined range, and the sequential conversion unit stops bit generation when the signal is outside this range or when the required precision is achieved. This avoids unnecessary conversion operations for out-of-range signals, reducing power consumption while maintaining required precision for relevant signals.
2Use of energy by moving object
If the sampling rate is decreased, then power consumption per unit time is reduced, but the data rate of digital signal is decreased
Solution Approach 1:
The patent performs partial AD conversion operations based on signal characteristics. The determination unit identifies signals within the interest range, and the sequential conversion unit processes only these signals fully while stopping early for out-of-range signals. This selective processing reduces average power consumption while maintaining data rate for important signals, as the converter remains ready to process subsequent signals immediately.
3Reliability
If the sequential conversion unit continues generating all bits, then the completeness of digital signal is ensured, but power consumption increases unnecessarily
Solution Approach 1:
The patent implements partial bit generation based on signal relevance. The determination unit checks if the analog signal is within the predetermined interest range, and the stop control unit halts the sequential conversion unit when the signal is outside this range or when sufficient precision is achieved. This ensures complete and accurate conversion for important signals while avoiding unnecessary bit generation for irrelevant signals, reducing power consumption while maintaining reliability for critical data.
Solution Approach 2:
The patent extracts and processes only the relevant portion of the signal spectrum by defining an interest range. The determination unit identifies signals within this extracted range, and the conversion process is applied selectively to these extracted signals. This separation allows the system to focus computational resources on meaningful signals while ignoring irrelevant ones, reducing overall power consumption without compromising the completeness of important data.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces power consumption by stopping unnecessary bit generation when the signal is outside the set range, thereby optimizing power usage without compromising sampling rate.
Implementation Method 1
a comparator configured to compare the analog signal to a reference signal and generate the bits on a basis of a result of the comparison
Data Source
AI summary
To reduce power consumption of a sequential comparison analog-to-digital converter. An analog-to-digital converter includes a sequential conversion unit, a determination unit, and a stop control unit. The sequential conversion unit sequentially generates a predetermined number of bits of a value corresponding to an analog signal when the analog signal is input. The determination unit determines whether a value of a digital signal including the predetermined number of bits is within a predetermined range whenever the bits are generated. The stop control unit stops the sequential conversion unit in a case in which the value of the digital signal is not within the predetermined range.