Sequential Semiconductor Tester Module Segmentation
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Solution Overview
Problem
Conventional semiconductor device testers, particularly Automatic Test Equipment (ATE), are expensive and inefficient, requiring long test times and limited to testing a single device at a time, whereas application environment testers lack the ability to test multiple devices simultaneously and maintain signal integrity.
Innovation Solution
A sequential semiconductor device tester is designed with a test pattern generating module and multiple test execution modules connected in series, allowing for the generation and sequential relay of test pattern data to multiple devices, maintaining signal integrity and improving efficiency by enabling simultaneous testing under application environment or ATE conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional ATE is used to test semiconductor devices, then testing capability is provided, but manufacturing cost is high and device complexity is large
Solution Approach 1:
The tester is divided into multiple independent test execution modules that can be connected in series. Each module contains similar functional components (pattern generator, timing generator, comparator), allowing the system to be segmented into manageable units that reduce overall complexity and manufacturing cost while maintaining comprehensive testing capability.
Solution Approach 2:
The test execution modules are designed with universal functionality to test multiple semiconductor devices of different types (DRAM, SRAM, Flash memory) using the same modular architecture. This multi-functionality reduces device complexity by eliminating the need for dedicated testing equipment for each device type.
2Productivity
If conventional ATE tests multiple parameters, then comprehensive testing is achieved, but test time increases
Solution Approach 1:
Multiple test execution modules operate continuously in series, with each module testing different aspects of semiconductor devices simultaneously. The sequential connection allows uninterrupted testing flow where one module prepares test patterns while another executes tests, maintaining continuous productive action without compromising comprehensive parameter coverage.
Solution Approach 2:
The pattern generator module pre-generates test patterns and timing signals before the actual testing begins. This preliminary preparation allows the test execution modules to start testing immediately without delays, reducing overall test time while ensuring all necessary parameters are tested through pre-planned test sequences.
3Productivity
If test pattern data is transmitted to multiple devices simultaneously, then testing efficiency is improved, but signal integrity may deteriorate
Solution Approach 1:
The transmission of test pattern data is segmented and relayed sequentially through each test execution module in series. Each module receives and processes the test pattern data independently before passing it to the next module, which prevents signal degradation that would occur with simultaneous parallel transmission to multiple devices while maintaining high testing efficiency through sequential operation.
Data Source
AI summary
A sequential semiconductor device tester, and in particular to a sequential semiconductor device tester is disclosed. In accordance with the sequential semiconductor device tester, a function of generating a test pattern data for a test of a semiconductor device and a function of carrying out the test are separated to sequentially test the semiconductor device, to maintain a signal integrity and to improve an efficiency of the test by carrying out a test under an application environment or an ATE test according to the test pattern data.