Sequential Voltage Control for Memory Devices

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Solution Overview

Problem

Memory devices face issues with adverse semiconductor behavior, undue power consumption, and data integrity problems due to inversion of relative voltages between voltage buses or components during idling or low-power modes, leading to inefficient operation.

Innovation Solution

Implementing sequential enabling and disabling of voltage sources based on relative voltage levels, starting from higher nominal voltages to lower voltages during power-down and vice versa during power-up, to maintain relative biasing and improve memory device operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If voltage sources are disabled simultaneously during power-down, then power consumption is reduced, but adverse semiconductor behavior and data integrity problems occur due to voltage inversion

Engineering Contradiction:
Improvepower consumptionVSAvoiddata integrity
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The patent applies preliminary action by disabling lower voltage sources before higher voltage sources during power-down. This sequencing prevents voltage inversion conditions that cause adverse semiconductor behavior while still achieving power reduction. The lower voltage sources are turned off first, allowing higher voltage sources to remain active and maintain proper biasing conditions, thus preventing data integrity issues before they can occur.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent inverts the conventional approach by disabling voltage sources in reverse order of their voltage levels (lowest first, highest last) rather than simultaneously or in voltage-descending order. This inverted sequencing strategy specifically addresses the voltage inversion problem by ensuring that when a voltage source is disabled, higher voltage sources remain active to maintain proper potential relationships, thereby preventing adverse semiconductor effects while achieving power savings.

Inventive Principle:
Principle #13The other way round (Inversion)

2Device complexity

If voltage sources are disabled in arbitrary order, then power-down is simplified, but adverse semiconductor behavior occurs due to voltage inversion between components

Engineering Contradiction:
Improvecontrol complexityVSAvoidadverse semiconductor behavior
Core Design Contradiction:
Device complexityVSObject-affected harmful factors

Solution Approach 1:

The patent establishes a predetermined disablement sequence based on voltage levels as a preliminary action. This sequencing rule (lowest voltage first, highest voltage last) is established before operation, providing a simple yet effective method to avoid voltage inversion issues without requiring complex real-time control logic. The sequence is implemented through straightforward comparison of voltage source levels.

Inventive Principle:
Principle #10Preliminary action

3Loss of energy

If higher voltage sources are disabled before lower voltage sources, then power consumption is reduced faster, but relative biasing is inverted causing harmful effects

Engineering Contradiction:
Improvepower consumptionVSAvoidadverse semiconductor behavior
Core Design Contradiction:
Loss of energyVSObject-generated harmful factors

Solution Approach 1:

The patent applies the inversion principle by reversing the intuitive approach of disabling higher voltage sources first. Instead, it disables lower voltage sources first while keeping higher voltage sources active. This inverted sequence prevents the harmful voltage inversion effect because the higher voltage sources continue to establish proper potential relationships even as lower voltage sources are turned off, thereby eliminating the harmful effect while still achieving progressive power reduction.

Inventive Principle:
Principle #13The other way round (Inversion)

Data Source

PatentUS11798634B2Sequential voltage control for a memory device
Publication Date: 2023.10.24 MICRON TECHNOLOGY INC
  • US11798634B2 patent drawing
  • US11798634B2 patent drawing
  • US11798634B2 patent drawing

AI summary

Methods, systems, and devices for sequential voltage control for a memory device are described. A memory device may have various voltage sources that support different voltage levels used in various operations of the memory device. Voltage sources of a memory device may be disabled under some circumstances, such as when the memory device is idled, or operated in a low-power or powered-down mode, among other circumstances. In accordance with examples as disclosed herein, voltage sources of a memory device or memory die may be sequentially enabled or sequentially disabled. For example, voltage sources may be enabled in an order from voltage sources having relatively higher nominal voltages to voltage sources having relatively lower voltages, or disabled in an order from voltage sources having relatively lower nominal voltages to voltage sources having relatively higher voltages.