SERDES Receiver Frequency Acquisition Without External PLLs
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Solution Overview
Problem
Existing data communication systems, particularly SERDES receivers, are inadequate for high-data applications due to high power consumption and large device area requirements, as they rely on external reference clocks and phase-lock loops, which are costly and inefficient.
Innovation Solution
A SERDES receiver design that eliminates the need for external reference clocks and phase-lock loops by using an on-chip oscillator to generate clock signals, with a digital control module to set frequency and an analog control module to adjust phase, along with data samplers and early/late detection logic to determine the correct sampling frequency through a frequency sweep process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If external reference clocks and phase-lock loops are used in SERDES receivers, then clock signal generation and distribution is achieved, but power consumption increases and device area expands
Solution Approach 1:
The patent extracts and removes the external reference clock and phase-lock loop components from the SERDES receiver system, replacing them with an on-chip oscillator that generates clock signals internally. This elimination of external components directly reduces power consumption while maintaining the essential clock signal generation function.
Solution Approach 2:
The on-chip oscillator is designed to perform multiple functions: generating the reference clock signal, providing timing for data sampling, and enabling frequency sweeping for eye diagram optimization. This multi-functional approach consolidates what previously required separate external components, reducing overall power consumption.
2Reliability
If external reference clocks and phase-lock loops are used in SERDES receivers, then clock signal generation and distribution is achieved, but device area increases
Solution Approach 1:
The patent removes external reference clock components and phase-lock loops from the system architecture, replacing them with a compact on-chip oscillator. This extraction of external components directly reduces the device area occupied by clock generation and distribution circuitry.
Solution Approach 2:
The patent merges the functions of external reference clocks, phase-lock loops, and clock distribution networks into a single on-chip oscillator unit. This consolidation integrates multiple functions into one compact component, significantly reducing the overall device area while maintaining reliable clock signal generation.
3Measurement precision
If frequency sweeping is performed to determine target sampling frequency, then optimal data sampling is achieved, but additional measurement and control circuitry is required
Solution Approach 1:
The patent implements a self-service mechanism where the on-chip oscillator automatically performs frequency sweeping and uses early/late detection logic to identify the optimal sampling frequency. The system self-adjusts without requiring external measurement equipment or complex external control circuitry, achieving precise sampling frequency determination through integrated functions.
Solution Approach 2:
The patent incorporates early/late detection logic that provides feedback to the on-chip oscillator during frequency sweeping. This feedback mechanism allows the system to automatically identify when the optimal sampling frequency is reached by detecting early or late sampling conditions, eliminating the need for complex external measurement and control systems.
Data Source
AI summary
The present invention is directed to data communication. More specifically, embodiments of the present invention provide a method for acquiring sampling frequency by sweeping through a predetermined frequency range, performing data sampling at different frequencies within the predetermined frequency range, and determining a target frequency for sampling data based on a maximum early peak frequency and a maximum late peak frequency. There are other embodiments as well.


