Serial-Gate Transistor Layout for High-Voltage Memory Blocks
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Solution Overview
Problem
High-voltage transistors in semiconductor integrated circuits face challenges with peak electric fields, requiring wider areas and longer channels to withstand high voltages, leading to increased size and power consumption.
Innovation Solution
The introduction of a serial-gate transistor design with independently controlled gates and decoupled source-drain regions, reducing peak electric fields by distributing the electric field across multiple gates, thereby minimizing channel length and area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a high-voltage transistor uses a thicker gate insulating film and longer channel to sustain high voltage, then the transistor can endure punch-through phenomenon and sustain high voltage, but the transistor area becomes wider and larger
Solution Approach 1:
The gate insulating film is divided into a first gate insulating film and a second gate insulating film with different dielectric constants. The first gate insulating film (closer to channel) has higher dielectric constant than the second gate insulating film (closer to gate electrode). This segmentation allows the transistor to sustain high voltage with a shorter effective channel length, reducing the transistor area while maintaining high voltage endurance capability.
2Reliability
If a high-voltage transistor uses a longer channel to endure electric field, then the transistor can withstand punch-through phenomenon, but the channel length increases leading to larger device size
Solution Approach 1:
The gate insulating film exhibits spatially varying dielectric properties: the first gate insulating film region (adjacent to channel) has higher dielectric constant to strengthen electric field control near the channel and prevent punch-through, while the second gate insulating film region (adjacent to gate electrode) has lower dielectric constant. This local quality differentiation enables punch-through resistance with reduced channel length.
3Reliability
If a high-voltage transistor increases gate insulating film thickness to sustain high voltage, then the transistor can handle high voltage, but the transistor requires wider area
Solution Approach 1:
The dielectric constant parameter of the gate insulating film is changed spatially: the first gate insulating film has a higher dielectric constant than the second gate insulating film. This parameter change enables the transistor to achieve high voltage capability with a shorter channel length, thereby reducing the overall transistor area while maintaining high voltage sustainability.
Data Source
AI summary
The present disclosure provides serial-gate transistors and nonvolatile memory devices including serial-gate transistors. In some embodiments, a nonvolatile memory device includes a plurality of memory blocks, a plurality of pass transistor blocks, and a plurality of gates sequentially arranged in a horizontal direction in a gate region above a semiconductor substrate. Each of the plurality of pass transistor blocks includes a plurality of serial-gate transistors configured to transfer a plurality of driving signals to a corresponding memory block of the plurality of memory blocks. Each of the plurality of serial-gate transistors includes a first source-drain region, a gate region, and a second source-drain region that are sequentially arranged in a horizontal direction at a semiconductor substrate. The plurality of gates are electrically decoupled from each other. A plurality of block selection signals respectively applied to the plurality of gates are controlled independently of each other.