Serial Interconnect for Programmable Logic Devices
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Programmable logic devices (PLDs) face significant area and power consumption challenges due to the large amount of interconnect resources, which can occupy up to 40% of the device area and consume substantial power, especially as the devices increase in size and capability.
Innovation Solution
Implementing onboard serial interconnect resources throughout the PLD, particularly between major portions of the device, while maintaining parallel local interconnect, to reduce the need for parallel conductors and simplify interconnect architecture, using serializer/deserializer circuitry and a common clock source for synchronous operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If parallel interconnect resources are used to connect programmable logic resources, then signal routing flexibility is maintained, but device area consumption increases significantly (up to 40% of total device area)
Solution Approach 1:
The patent changes the fundamental parameter of interconnect signaling from parallel to serial mode. By using serializer/deserializer circuitry, multiple parallel data lines are converted into a single serial data line, dramatically reducing the area required for interconnect resources while maintaining the ability to route signals between programmable logic resources.
Solution Approach 2:
The patent merges multiple parallel interconnect lines into a single serial interconnect line. By combining the functions of multiple conductors into one serial channel with appropriate serialization/deserialization, the device area required for interconnect resources is significantly reduced while preserving routing capabilities.
2Use of energy by stationary object
If parallel interconnect resources are used throughout the device, then signal transmission speed is maintained, but power consumption increases due to the large number of conductors
Solution Approach 1:
The patent changes the signaling parameter from parallel to serial, which reduces the number of active conductors and associated power consumption. The serial interconnect uses a single data line instead of multiple parallel lines, directly reducing the energy required to drive interconnect resources while maintaining acceptable transmission speeds through the serialization process.
3Area of stationary object
If serial interconnect is implemented between logic array blocks, then interconnect area is reduced, but device complexity increases due to added serializer/deserializer circuitry
Solution Approach 1:
The patent implements universal serializer/deserializer circuitry that can be distributed throughout the device at logic array block boundaries. These serial interface circuits serve multiple functions: they enable serial interconnect between blocks, maintain compatibility with existing parallel logic elements, and provide a standardized interface that can be used consistently across different device configurations, thereby managing complexity through uniformity.
Data Source
AI summary
In a programmable logic device, some or all of the parallel interconnect resources are replaced by serial interconnect resources within the device. Some or all of the functional blocks on the device are supplemented with serial interfaces. Although this makes the functional blocks more complex, it allows a significant reduction in the area consumed by interconnect resources. This translates into a significant reduction in device power consumption. The serial interfaces may operate synchronously from a global device clock (such as a PLL). In some cases, serial interfaces that are provided in the input/output blocks for external signalling can be omitted because the serial interfaces in the functional blocks can take over the external serial interface function as well, although in those cases the serial interfaces in the functional blocks would have to be more complex because they would have to be able to operate asynchronously with external devices.