Serializer Loopback Testing Without On-Chip Deserializer Overhead
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Solution Overview
Problem
Testing serializers in integrated circuits is challenging due to the difficulty in ensuring proper functionality without consuming large amounts of integrated circuit area.
Innovation Solution
A test data generator passes multibit words to the serializer using a low-speed clock, generating a single bit data stream with phase signals, which are sampled and compared against a reference signature to verify functionality, consuming minimal circuit area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional testing circuits are used to test the serializer, then the serializer functionality can be verified, but the integrated circuit area consumption increases significantly
Solution Approach 1:
The serializer is made to serve dual purposes: normal data transmission function and self-testing function. By using the serializer's own output to test itself through the sampling circuit and signature generator, the patent eliminates the need for separate dedicated testing circuits, thereby reducing integrated circuit area while maintaining testing accuracy
Solution Approach 2:
The testing system uses the serializer's own high-speed output signal to perform self-diagnosis. The sampling circuit captures the serializer's output and the signature generator compares it against expected patterns, allowing the serializer to test itself without external testing equipment, thus minimizing additional area consumption
2Measurement precision
If complex testing circuits are implemented to ensure serializer functionality, then testing accuracy improves, but device complexity increases
Solution Approach 1:
A sampling circuit acts as an intermediary between the high-speed serializer output and the lower-speed signature generator. This intermediary component enables accurate capture and comparison of the serializer output without requiring complex high-speed testing logic, thereby maintaining testing precision while controlling overall circuit complexity
Solution Approach 2:
The sampling circuit creates a copy of the serializer's high-speed output signal at a lower speed that can be processed by the signature generator. This copying approach allows accurate testing without requiring the entire testing system to operate at high speeds, simplifying the testing circuit design
Data Source
AI summary
An integrated circuit includes a serializer configured to receive first test data in n-bit words and to generate a single bit data stream by serializing the test data in accordance with a first clock signal. The integrated circuit includes testing circuitry configured to test the serializer without utilizing a deserializer.


