Series MFM Decoupling Capacitors for FeRAM Voltage Stress Relief
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The reliability of metal-ferroelectric insulator-metal (MFM) capacitors is limited by time-dependent dielectric breakdown, leading to premature failure under high stress voltage, which restricts their application in decoupling capacitors, and traditional methods require separate fabrication processes increasing costs and chip area.
Innovation Solution
Incorporating multiple MFM decoupling capacitors in series to divide the input voltage, reducing stress voltage on each capacitor and allowing for simultaneous fabrication with FeRAM cells using the same materials, thereby extending their application and reducing chip area and costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If MFM capacitors are used as decoupling capacitors under high stress voltage, then power handling capability is improved, but reliability deteriorates due to time-dependent dielectric breakdown
Solution Approach 1:
The patent divides the high voltage stress into multiple segments by connecting multiple MFM capacitors in series. Each capacitor experiences a portion of the total voltage stress, reducing the individual stress level below the dielectric breakdown threshold while maintaining the overall power handling capability of the decoupling network.
2Adaptability or versatility
If separate fabrication processes are used for different capacitors, then each capacitor can be optimized for its specific function, but manufacturing complexity and cost increase
Solution Approach 1:
The patent creates a universal MFM capacitor structure that can serve multiple functions: FeRAM memory cells and decoupling capacitors. Both applications use the same metal-ferroelectric insulator-metal stack fabricated through identical process steps, eliminating the need for separate fabrication lines while maintaining function-specific performance through circuit-level design.
3Adaptability or versatility
If multiple capacitor types are integrated on the same chip, then system-on-chip functionality is improved, but chip area increases
Solution Approach 1:
The patent implements a multi-functional MFM capacitor structure that serves both as FeRAM memory storage and as decoupling capacitance. This universal structure reduces chip area by eliminating redundant capacitor implementations, as the same physical structure fulfills multiple electrical functions within the system-on-chip architecture.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability and effectiveness of MFM decoupling capacitors by reducing stress voltage and allowing for integrated, cost-effective fabrication within FeRAM processes, improving power handling and reducing chip area.
Implementation Method 1
a first ferroelectric random access memory (FeRAM) memory element disposed in the memory region of the device in a first inter-metal dielectric (IMD) layer over the access transistor... a first FeRAM memory element includes a bottom electrode, top electrode over the bottom electrode, and a ferroelectric insulating layer interposed between the top electrode and the bottom electrode
Data Source
AI summary
In an embodiment, a structure includes one or more first transistors in a first region of a device, the one or more first transistors supporting a memory access function of the device. The structure includes one or more ferroelectric random access memory (FeRAM) capacitors in a first inter-metal dielectric (IMD) layer over the one or more first transistors in the first region. The structure also includes one or more metal-ferroelectric insulator-metal (MFM) decoupling capacitors in the first IMD layer in a second region of the device. The MFM capacitors may include two or more capacitors coupled in series to act as a voltage divider.