Series MOS Power Clamp Circuit for Reliable ESD Discharge
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Solution Overview
Problem
Power clamp circuits in the semiconductor industry face challenges in protecting main circuits from electro-static discharge (ESD) due to the lowering operating voltage of MOS transistors, which can lead to damage during ESD events and normal operation, necessitating enhanced reliability measures.
Innovation Solution
A power clamp circuit design incorporating a series connection of MOS transistors, triggering circuits with resistors and capacitors, and voltage branch circuits to manage ESD events, ensuring reliable operation by blocking current paths during normal conditions and enabling ESD current discharge when necessary.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the operating voltage of MOS transistors is lowered, then power consumption is reduced, but reliability deteriorates due to increased susceptibility to ESD damage
Solution Approach 1:
The power clamp circuit is divided into multiple MOS transistors (first, second, and third MOS transistors) connected in series between power rails. This segmentation allows each transistor to withstand a portion of the total voltage, enabling the use of lower-voltage transistors that individually consume less power while collectively providing adequate ESD protection through the series configuration.
2Object-affected harmful factors
If MOS transistors are used in power clamp circuits, then ESD protection is provided, but reliability worsens due to potential damage during ESD events and normal operation
Solution Approach 1:
The circuit incorporates triggering circuits with capacitors and resistors that detect ESD events beforehand and activate protection mechanisms. The capacitors charge during normal operation and discharge during ESD events to trigger the MOS transistors into protection mode, cushioning the main circuit from direct ESD damage while maintaining transistor reliability through controlled activation.
3Measurement precision
If triggering circuits with capacitors and resistors are added, then ESD detection capability is improved, but device complexity increases
Solution Approach 1:
The triggering circuits serve multiple functions: they detect ESD events, control the activation of protection transistors, and maintain circuit operation during normal conditions. The capacitors and resistors are integrated into the existing power clamp structure, allowing these components to perform both detection and protection functions without requiring entirely separate circuitry, thereby limiting the increase in overall device complexity.
Data Source
AI summary
A power clamp circuit includes an electro-static discharge (ESD) current discharge circuit including a first MOS transistor, a second MOS transistor, and a third MOS transistor that are coupled in series between a first power rail coupled to a supply voltage and a second power rail coupled to a ground voltage, a first triggering circuit including a first resistor, a first capacitor, and a fourth MOS transistor and configured to trigger the first MOS transistor, a second triggering circuit including a second resistor, a second capacitor, and a fifth MOS transistor and configured to trigger the second MOS transistor, and a third triggering circuit configured to turn off the third MOS transistor during a normal operation and turn on the third MOS transistor when an ESD event occurs.