Series-Parallel Memory Cells for Area-Efficient Multi-Level Storage

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Solution Overview

Problem

Existing memory devices struggle with efficient storage of multi-level data due to limitations in area efficiency and speed, particularly in non-volatile memory devices.

Innovation Solution

A memory system utilizing a plurality of memory cells arranged in series and parallel connections, controlled by a memory controller to program and read multi-level data based on effective resistance changes, allowing for efficient storage and reading of multiple bits in a compact area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If non-volatile memory devices are used to retain data after power shutdown, then data retention is improved, but access speed deteriorates compared to volatile memory devices

Engineering Contradiction:
Improvedata retentionVSAvoidaccess speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The memory device is segmented into multiple memory cells that can be individually programmed and read. Each memory cell stores one bit of data and can be selectively accessed through word lines and bit lines, allowing efficient retrieval of specific data without reading the entire memory array, thus maintaining fast access speeds while retaining data in non-volatile cells.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic voltage application and current sensing mechanisms that adapt to the specific needs of reading and programming operations. During read operations, voltage is applied to sense current flow through memory cells, while during programming, voltage pulses are applied to change cell states. This dynamic control enables the system to optimize performance for each operation type, maintaining speed for volatile-like access while ensuring retention for non-volatile storage.

Inventive Principle:
Principle #15Dynamics

2Quantity of substance

If multiple memory cells are connected in series to increase storage capacity, then data density is improved, but read complexity increases due to multiple sensors being required

Engineering Contradiction:
Improvedata densityVSAvoidread complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

Multiple memory cells connected in series are read through a single sensor by measuring the total current flow across all cells. The read operation combines the effect of multiple cells into a unified measurement, where the sensor detects the cumulative current rather than requiring individual sensors for each cell. This merging approach maintains data density while simplifying the read architecture to use only one sensor.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The memory cells themselves serve as the sensing elements through their resistance changes. When voltage is applied across series-connected cells, their individual resistance states (programmed or erased) automatically contribute to the total current measurement. The cells essentially read themselves through their electrical properties without requiring external sensing mechanisms for each individual cell, reducing overall system complexity.

Inventive Principle:
Principle #25Self-service

3Measurement precision

If multiple sensors are used to read multi-level data from memory cells, then measurement precision is improved, but device complexity and cost increase

Engineering Contradiction:
Improvedata reading accuracyVSAvoidnumber of sensors
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The memory cells provide their own sensing function through their resistance states. When voltage is applied across a string of memory cells, their programmed states (high or low resistance) automatically modulate the current flow. This self-sensing mechanism eliminates the need for separate sensors for each cell, as the cells themselves serve as the sensing elements, maintaining measurement precision while reducing device complexity and cost.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

Multiple sensing functions are merged into a single sensor that measures the combined effect of all memory cells in series. The sensor reads the cumulative resistance state of the memory cell string, and the controller interprets this combined signal to determine individual cell states. This merging of sensing functions reduces the number of sensors required while maintaining the ability to accurately read multi-level data through logical operations on the combined measurement.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The system achieves area-efficient storage and reading of multi-level data by leveraging the resistance changes in grouped memory cells, enabling efficient storage and retrieval of data without requiring multiple sensors, thus enhancing data density and operational efficiency.

Implementation Method 1

Each memory cell may have a resistance corresponding to the programmed state

Methodology Applied
Scientific EffectResistive memory effect: Electrical Resistance

Implementation Method 2

sensing current through the second line according to the individually programmed memory cells

Methodology Applied
Scientific EffectOhmic conduction: Ohm's Law

Data Source

PatentUS20250299732A1Systems and methods to store multi-level data
Publication Date: 2025.09.25 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250299732A1 patent drawing
  • US20250299732A1 patent drawing
  • US20250299732A1 patent drawing

AI summary

Disclosed herein are related to a memory system and a method of operating the memory system. In one aspect, resistances of a first memory cell, a second memory cell, a third memory cell, and a fourth memory cell are individually set. In one aspect, the first memory cell and the second memory cell are coupled to each other in series between a first line and a second line, and the third memory cell and the fourth memory cell are coupled to each other in series between the second line and a third line. In one aspect, current through the second line according to a parallel resistance of i) a first series resistance of the first memory cell and the second memory cell, and ii) a second series resistance of the third memory cell and the fourth memory cell is sensed. According to the sensed current, multi-level data can be read.